Synthesizer Board
4: Technical Description
TW7000MS
4-23
4.3
Synthesizer Board
The Synthesizer board plugs into the motherboard at J4. The main purpose of
this board is to take the reference frequency input (16.777216 MHz) from the
Reference/Control board and use it to generate the three local oscillator
frequencies. It uses direct digital synthesis (DDS) techniques, in combination
with standard phase locked loop (PLL) circuitry, in the implementation of the
LO scheme.
The heart of the synthesizer is the DDS, which generates an output of
5.95 MHz to 7.00 MHz, depending on the selected input channel frequency.
This is mixed with the output of the 70 MHz voltage controlled oscillator, then
filtered and mixed again with the output of the first LO in the feedback path of
the PLL which generates the first LO. The output of the first LO is 75MHz to
105 MHz in 10 Hz increments. The second LO is the fixed 70 MHz output of
the voltage controlled oscillator. The third LO is generated by another PLL
tied to the overall reference frequency of the radio and programmed to one of
three outputs, depending on the setting of the front panel mode switch.
4.3.1
Interconnections
For the interconnect lines between the Synthesizer board and the rest of the
radio, refer to the table below. Data for all of the synthesizers in the board is
input in serial format, with all data clocked as required to update frequency
selection. It is then latched into the particular synthesizer device by the
appropriate enable line.
Table 4-5. Synthesizer Board Interconnects
Connector J4
Description
Comment
1
GND
Ground
2
+12V input
+12V
3
SPIRXD
Receive serial data line
4
SPICLK
Clock line
11
EN5
Not used
12
EN3
First LO synthesizer enable
13
EN1
Third LO synthesizer enable
14
GND
Ground
15
+12V input
+12V
16
SPITXD
Transmit serial data line
17
BITE
BITE signal to processor
24
EN4
BITE enable
25
EN2
DDS enable
Содержание TW7000MS
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