USB3-FRM13_K Users Manual (Rev 1.0)
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- http://www.daqsystem.com
2. USB3-FRM13_K Function
2.1 Block Diagram
As shown in the following figure, main control of the board is performed in FPGA Core Logic.
The primary functions are writing to the DDR#1, DDR#2 memory after receiving the frame data
from two Mini MDR-26, and sent to PC by the request.
These functions are performed by using
API through USB 3.0 Interface at the PC.
[Figure 2-1. USB3-FRM13_K Block Diagram]
Programming FPGA Core Logic is performed via the JTAG interface. The logic program of the
FPGA is saved in a flash ROM, it is located on the board and loaded at the power-up time.
