Chapter 3
Connecting the Signals
©
National Instruments Corporation
3-31
DAQCard-1200 User Manual
Figure 3-20.
General-Purpose Timing Signals
The GATE and OUT signals in Figure 3-20 are referenced to the rising edge
of the CLK signal.
Connecting the Power
Pin 49 of the I/O connector su5 V from the DAQCard-1200 power
supply. This pin is referenced to DGND. You can use the +5 V to power
external digital circuitry.
•
Power rating
250 mA at +5 V maximum, fused to 1 A
Caution
Do
not
directly connect this +5 V power pin to analog or digital ground or to any
other voltage source on the DAQCard-1200 or any other device. Doing so can damage the
DAQCard-1200 or the PC. NI is
not
liable for any damage due to incorrect power
connections.
CLK
GATE
OUT
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
t
sc
t
pwh
t
pwl
t
gsu
t
gh
t
gwh
t
gwl
t
outg
t
outc
t
sc
t
pwh
t
pwl
t
gsu
t
gh
t
gwh
t
gwl
t
outg
t
outc
clock period
clock high level
clock low level
gate setup time
gate hold time
gate high level
gate low level
output delay from clock
output delay from gate
380 ns min
230 ns min
150 ns min
100 ns min
50 ns min
150 ns min
100 ns min
300 ns max
400 ns max