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CP-780 Service Manual
window(WBC-bit) or below or above this window (HBC-bit). This indication can be read from the
status byte 01 and can be used for automatic adjustment of the Vg2 voltage during the
production of the TV receiver. During this test the vertical scan remains active so that the
indication of the 2 bits can be made visible on the TV screen.
The control circuit contains a beam current limiting circuit and a peak white limiting circuit. The
control is realised by means of a reduction of the contrast and brightness control settings. The
way of control (first contrast and then brightness or contrast and brightness in parallel) can be
chosen by means of the CBS bit (subaddress 44H). The peak white level is adjustable via the
I2C-bus.
To prevent that the peak white limiting circuit reacts on the high frequency content of the video
signal a low-pass filter is inserted in front of the peak detector. The circuit also contains a soft-
clipper which prevents that the high frequency peaks in the output signal become too high. The
difference between the peak white limiting level and the soft clipping level is adjustable via the
I2C-bus in a few steps.
During switch-off of the TV receiver a fixed beam current is generated by the black current
control circuit. This current ensures that the picture tube capacitance is discharged. During the
switch-off period the vertical deflection can be placed in an overscan position so that the
discharge is not visible on the screen.
A wide blanking pulse can be activated in the RGB outputs by means of the HBL bit in
subaddress 43H. The timing of this blanking can be adjusted by means of the bits WBF/R bits
in subaddress 26H.
5.2.11 I2C-BUS USER INTERFACE DESCRIPTION
The UOC III series is fully controlled via the I2C-bus. Control is exercised by writing data to one
or more internal registers. Status information can be read from a set of info registers to enable
the controlling microcontroller determine whether any action is required. The device has an I2C-
bus slave transceiver, in accordance with the fast-mode specification, with a maximum speed of
400 kbits/s. Information concerning the I2C-bus can be found in brochure I2C-bus and how to
use it (order number 939839340011). To avoid conflicts in a real application with other ICs
providing similar or complementary functions, there are two possible slave addresses available
which can be selected by the SVM pin(pin 65).
Possible slave address
SVM PIN SLAVE ADDRESS A6 TO A0
Scavem application 1 0 0 0 1 0 1
Tied 5 volts 1 0 0 0 1 1 1
The device will not respond to a generalcall on the I2C-bus, i.e. when a slave address of
0000000 is sent by a master.
Write registers
Each address of the address space (see below) can only be written.