Cypress CY8CKIT-040 PSoC 4000 Pioneer Kit, Руководство пользователя

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CY8CKIT-040 PSoC
®
4000 Pioneer Kit Guide, Doc. # 001-91316 Rev. *F 166
Appendix
A.4 Use of Zero-ohm Resistors and No Load
Unit Resistor Usage
Power supply R2 Solder zero-ohm resistors to access voltage from VBUS (USB).
I
2
C connection between PSoC 5LP
and PSoC 4
R24 and R25
Unsolder the resistors to communicate with an external PSoC
using the PSoC 5LP. Removing these will disable the PSoC 4 I
2
C
communication with the PSoC 5LP device.
PSoC 4/external PSoC program/
debug header R32, R33, and
R34
Unsolder the resistors to disconnect SWD lines from the PSoC 4.
Use J6 to connect and program an external PSoC. Removing these
will disable PSoC 4 programming by the PSoC 5LP device and
through the J6 header.
Protection circuit R46 Solder zero-ohm resistors to bypass the entire protection circuitry.
CapSense tuning circuitry R1
Convert IDAC output to a voltage, or used as a bleed resistor to
CMOD.
CapSense tuning circuitry/user inter-
face
R30
Unsolder R30, which connects P0[2] to the blue LED to enable
shield tank capacitor C5 on P0[2].
PSoC 4 R4, R6
Unsolder R4 to remove supply to VTARG and solder zero-ohm
resistors R6 to supply P4_VDD with VDD instead of J13.
PSoC 5LP programmer/debugger R11, R12, R14,
R15, R16
For future use.
R5 Unsolder the zero-ohm resistor to cut the VDD supply to PSoC 5LP.
R7 For future use.
F-RAM
R14, R15, R16,
R17, R18, and
R19
Select the lower three bits of the F-RAM I
2
C slave address. R14-
R15 selects bit 2 (A2), R16-R17 selects bit 1(A1), and R18-R19
selects bit 0 (A0). The selected bits are OR'ed with the F-RAM fam-
ily's I
2
C address (0x50) to decide the slave address for the one on
the board.
R56 and R55
Solder a zero-ohm resistor for R56 to write-protect the entire
F-RAM memory. R55 is not required to be populated as the WP pin
is internally pulled down. When the WP pin is left floating or R55 is
populated, write access to F-RAM is restored.
PSoC 5LP GPIO header R57
Unsolder the zero-ohm resistor to disconnect P3[0] from the
PSoC 5LP RX line and use P3[0] for PSoC 4 debug or PSoC 5LP
as a USB-UART bridge for another device.