Cypress CY62137FV30, Техническое описание

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CY62137FV30 MoBL
®
Document Number: 001-07141 Rev. *F Page 3 of 12
Maximum Ratings
Exceeding the maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
Storage Temperature ................................ –65°C to + 150°C
Ambient Temperature with
Power Applied .......................................... –55°C to + 125°C
Supply Voltage to Ground
Potential ...........................................................-0.3V to 3.9V
DC Voltage Applied to Outputs
in High Z state
[4, 5]
............................................-0.3V to 3.9V
DC Input Voltage
[4, 5]
.......................................–0.3V to 3.9V
Output Current into Outputs (LOW) ............................ 20 mA
Static Discharge Voltage ......................................... > 2001V
(MIL–STD–883, Method 3015)
Latch up Current .................................................... > 200 mA
Operating Range
Device Range
Ambient
Temperature
V
CC
[6]
CY62137FV30LL Ind’l/Auto-A –40°C to +85°C 2.2V to 3.6V
Auto-E –40°C to +125°C
Electrical Characteristics
Over the Operating Range
Parameter Description Test Conditions
45 ns (Ind’l/Auto-A) 55 ns (Auto-E)
Unit
Min Typ
[1]
Max Min Typ
[1]
Max
V
OH
Output HIGH Voltage 2.2 < V
CC
< 2.7 I
OH
= –0.1 mA 2.0 2.0 V
2.7 < V
CC
< 3.6 I
OH
= –1.0 mA 2.4 2.4 V
V
OL
Output LOW Voltage 2.2 < V
CC
< 2.7 I
OL
= 0.1 mA 0.4 0.4 V
2.7 < V
CC
< 3.6 I
OL
= 2.1mA 0.4 0.4 V
V
IH
Input HIGH Voltage 2.2 < V
CC
< 2.7 1.8 V
CC
+ 0.3 1.8 V
CC
+ 0.3 V
2.7 < V
CC
< 3.6 2.2 V
CC
+ 0.3 2.2 V
CC
+ 0.3 V
V
IL
Input LOW Voltage 2.2 < V
CC
< 2.7 –0.3 0.6 –0.3 0.6 V
2.7 < V
CC
< 3.6 –0.3 0.8 –0.3 0.8 V
I
IX
Input Leakage Current GND < V
I
< V
CC
–1 +1 –4 +4
μ
A
I
OZ
Output Leakage
Current GND < V
O
< V
CC
, Output disabled –1 +1 –4 +4
μ
A
I
CC
V
CC
Operating Supply
Current
f = f
max
= 1/t
RC
V
CC
= V
CC(max)
I
OUT
= 0 mA
CMOS levels
13 18 15 25 mA
f = 1 MHz 1.6 2.5 2 3
I
SB1
Automatic CE Power
Down Current – CMOS
Inputs CE > V
CC
– 0.2V,
V
IN
> V
CC
– 0.2V, V
IN
< 0.2V
f = f
max
(address and data only),
f = 0 (OE, WE, BHE, and BLE), V
CC
= 3.60V
1 5 1 20
μ
A
I
SB2
[7]
Automatic CE Power
Down Current – CMOS
Inputs CE > V
CC
– 0.2V,
V
IN
> V
CC
– 0.2V or V
IN
< 0.2V,
f = 0, V
CC
= 3.60V
1 5 1 20
μ
A
Capacitance
Tested initially and after any design or process changes that may affect these parameters.
Parameter Description Test Conditions Max Unit
C
IN
Input Capacitance T
A
= 25°C, f = 1 MHz,
V
CC
= V
CC(typ)
10 pF
C
OUT
Output Capacitance 10 pF
Notes
4. V
IL(min)
= –2.0V for pulse durations less than 20 ns.
5. V
IH(max)
=V
CC
+0.75V for pulse durations less than 20 ns.
6. Full device AC operation assumes a minimum of 100
μ
s ramp time from 0 to V
CC
(min) and 200
μ
s wait time after V
CC
stabilization.
7. Only chip enable (CE) and byte enables (BHE and BLE) are tied to CMOS levels to meet the I
SB2
/ I
CCDR
specification. Other inputs can be left floating.
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