PRELIMINARY
CY14B101LA, CY14B101NA
Document #: 001-42879 Rev. *B
Page 13 of 25
Software Controlled STORE/RECALL Cycle
Parameters
[27, 28]
Description
20 ns
25 ns
45 ns
Unit
Min
Max
Min
Max
Min
Max
t
RC
STORE/RECALL Initiation Cycle Time
20
25
45
ns
t
SA
Address Setup Time
0
0
0
ns
t
CW
Clock Pulse Width
15
20
30
ns
t
HA
Address Hold Time
0
0
0
ns
t
RECALL
RECALL Duration
200
200
200
µs
Switching Waveforms
Figure 12. CE and OE Controlled Software STORE/RECALL Cycle
[28]
Figure 13. Autostore Enable / Disable Cycle
t
RC
t
RC
t
SA
t
CW
t
CW
t
SA
t
HA
t
LZCE
t
HZCE
t
HA
t
HA
t
HA
t
DELAY
t
STORE
/t
RECALL
t
HHHD
t
LZHSB
High Impedance
Address #1
Address #6
Address
CE
OE
HSB (STORE only)
DQ (DATA)
RWI
t
RC
t
RC
t
SA
t
CW
t
CW
t
SA
t
HA
t
LZCE
t
HZCE
t
HA
t
HA
t
HA
t
DELAY
Address #1
Address #6
Address
CE
OE
DQ (DATA)
t
SS
Notes
27. The software sequence is clocked with CE controlled or OE controlled reads.
28. The six consecutive addresses must be read in the order listed in
Table 2
on page 5. WE must be HIGH during all six consecutive cycles.
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