background image

 

 

Getting Started with CY27410/30: 4-PLL Spread-Spectrum Clock Generator 

 

 

www.cypress.com

 

Document No. 001-94024 Rev.*A 

Cascading PLLs 

With  CY27410,  you  can  make  the  output  of  one  PLL  and 
provide it as an input to another PLL. This feature is called 
PLL cascading. This feature can be used to generate very 
precise frequencies using multiple dividers from two PLLs. 
It can also take the VCFS modulated output from one PLL 
and  feed  it  to  other  PLLs,  thus  generating  multiple 
frequencies that track the change in the frequency

Figure 

27

  shows  PLL1  configured  in  VCFS  mode,  its  output 

cascaded to PLL2 and PLL3, but PLL4 will run as the fixed 
(un-modulated) frequency generation. 

Figure 27. Cascading PLLs 

 

SSCG (Spread-Spectrum Clock Generator) 

CY27410

’S  spread-spectrum  feature  helps  overcome 

EMI/EMC  concerns.  The  device  supports  both  linear  and 
nonlinear  spread  profiles,  and  by  using  the  patented 
Lexmark  profile  as  the  nonlinear  profile,  offers  the  best 
peak EMI reduction in the industry.  

Figure 28

 

shows the scope sot for the Modulation Domain 

Analyzer (time is plotted on the X-axis,  while frequency is 
shown on the Y-axis). 

Figure 28. Spread Spectrum Clock Generator Profile 

 

 

 

The  spectrum  is  flat  for  nonlinear  profiles,  and  raised  at 
the edges  for linear profiles. In 

Figure 29

the nonspread- 

spectrum  profile  is  shown  in  red,  while  the  modulated 
nonlinear  (Lexmark)  and  linear  modulation  spectrums, 
~10 dB peak reduction at 633 MHz are shown in blue. 

Figure 29. Spread-Spectrum Profiles Supported by 

CY27410 

 

-80.00

-75.00

-70.00

-65.00

-60.00

-55.00

-50.00

-45.00

-40.00

-35.00

-30.00

62

3.80

62

4.75

62

5.70

62

6.65

62

7.60

62

8.55

62

9.50

63

0.45

63

1.40

63

2.35

63

3.30

63

4.25

63

5.20

63

6.15

63

7.10

63

8.05

63

9.00

63

9.95

64

0.90

64

1.85

64

2.8

0

64

3.75

SS 1%

Non-SS

Linear Profile

 

Содержание AN94024

Страница 1: ...ts Getting Started with CY27410 30 4 PLL Spread Spectrum Clock Generator 1 Contents 1 Overview 2 Key Specifications 2 Modes of Operation 2 CLKGEN Mode 2 ZDB Mode 3 NZDB Mode 3 Input Subsystem 3 Choosi...

Страница 2: ...ntroller frequency synthesis VCFS spread spectrum frequency select and glitch free outputs Key Specifications Input frequencies Crystal input 8 MHz to 48 MHz Reference clock 8 MHz to 250 MHz LVCMOS Re...

Страница 3: ...al 8 MHz to 700 MHz Figure 3 NZDB Configuration CY27410 can also be configured in combination of CLKGEN and ZDB CLKGEN and NZDB and ZDB and NZDB modes This offers unprecedented flexibility to the cust...

Страница 4: ...escribes how to interface the input reference signals to CY27410 and design considerations for input signals Input Frequency Tolerance The CY27410 design incorporates a narrow bandwidth high performan...

Страница 5: ...nputs The input swing amplitude should be more than 300 mV pp for the signal to meet the VIH VIL specifications LVCMOS Input Signal Figure 9 shows a simplified LVCMOS input buffer structure of CY27410...

Страница 6: ...ce standard is a differential I O standard and is defined in PCIe SIG standard Figure 14 shows the typical interface termination while Table 3 summarizes the recommended trace length parameters and te...

Страница 7: ...f 1 2 V Typical CML Output Standard CML interface is a differential I O standard and is defined in IEEE 802 3 spec Figure 20 shows the termination scheme of this standard Figure 20 CML Signaling Termi...

Страница 8: ...s function For example if trace characteristics are such that the propagation delay is 175 ps inch then a four inch delay will be 700 ps Voltage Controlled Frequency Shift VCFS CY27410 mimics the VCXO...

Страница 9: ...s overcome EMI EMC concerns The device supports both linear and nonlinear spread profiles and by using the patented Lexmark profile as the nonlinear profile offers the best peak EMI reduction in the i...

Страница 10: ...has two timing specifications fast switching and slow switching Fast switching is applicable for the output ON OFF output divider value change and output MUX setting change Slow switching is applicabl...

Страница 11: ...ates with CY27410 through commands and data that contains COM FS and miscellaneous information like I2C address read write protection etc Using an External I2 C Master You can use an external I2 C mas...

Страница 12: ...ument History Document Title Getting Started with CY27410 30 4 PLL Spread Spectrum Clock Generator AN94024 Document Number 001 94024 Revision ECN Orig of Change Submission Date Description of Change 4...

Страница 13: ...Cypress s patents that are infringed by the Software as provided by Cypress unmodified to make use distribute and import the Software solely for use with Cypress hardware products Any other use reprod...

Отзывы: