Cypress AN2121SC Скачать руководство пользователя страница 10

EZ-USB Series 2100

 Flexible for Many Applications

Loading 8051 Firmware from the Host

Options for Loading
8051 Firmware

The EZ-USB family provides
the peripheral developer with
four options for loading its
8051 firmware.

Software file from the
host system

Loading from a software file
provides the maximum flex-
ibility to the peripheral manu-
facturer. This configuration
takes advantage of the internal
4K or 8K RAM to load 8051 code
and data from the host system.
Because of the ReNumeration
capability of EZ-USB chips, a
new set of descriptors can be
loaded after the initial enumera-
tion without physically discon-
necting the device. This allows
device descriptors and 8051
program code to be loaded from
a driver disk. Only the vendor
ID, product ID, and device ID
need to be loaded during boot
time in hardware through a 16-
byte EEPROM. Using this

EEPROM loaded through the
I

2

C port

The EZ-USB architecture supports
an external EEPROM load
through the I

2

C bus. This gives

designers the capability to load
8051 program code from hard-
ware. Because of the flexibility of
the external EEPROM and inter-
nal RAM, manufacturers have the
option to make last-minute
changes to a design/code without
impacting production schedules.

External memory through the
memory expansion port

External memory may be added to
EZ-USB family members in the
80-pin PQFP package. This
memory is available through a
memory expansion port. Separate
16-bit address and 8-bit data
busses are also available to
directly attach to a 64K EPROM,
SRAM, or Flash memory. Unlike a
standard 8051, the address and
memory ports are not multi-
plexed, eliminating the need for
glue logic for connection to
external memory.

I

nternal ROM for peripheral

manufacturers who migrate to the
ROM-based EZ-USB chip

EZ-USB ROM options are soft-
ware and pin compatible to RAM
members of the family. Therefore,
high-volume customers can move
easily to ROM when their 8051
firmware code is solidified.

The EZ-USB architecture
includes features that give
the designer many options
for creating an efficient and
effective design that is
tailored to the needs of an
application.

configuration, users can implement
a USB function in a tiny 44 PQFP
package yielding a complete USB
solution in less than one square
inch of PC board space.

Содержание AN2121SC

Страница 1: ...also supports an equiva lent data transfer rate for bulk packets of over 2 Mbytes per second which is more than the USB bandwidth The EZ USB family conforms to the high speed 12 Mbps require ments of...

Страница 2: ...y eliminates the need to become an expert in USB It allows the designer to take advantage of the benefits of USB without investing large amounts of time and energy With the EZ USB family peripheral de...

Страница 3: ...nificantly less 8051 USB code since core handles most USB activity Architecture Shortened USB learning curve Quicker working prototypes and final production models More software development time to de...

Страница 4: ...gn implementation Peripheral manufacturers can provide firmware updates in conjunction with driver changes via a floppy disk or through Internet downloads Thus Unprecedented Soft Architecture software...

Страница 5: ...code download while holding the 8051 in reset Once enumerated the host PC downloads 8051 code into EZ USB RAM over the USB interface Anchor Chips supplies the software tools to incorporate the loader...

Страница 6: ...compared to other solutions And since less memory is needed for firmware board size and system cost are reduced Automatically Handles Low Level USB Overhead Test Code Supports USB Chapter 9 String des...

Страница 7: ...rt address of the requested descriptor data 2 The EZ USB core does the rest The EZ USB core automatically takes care of error checking and retries dividing the table into packets for the various IN tr...

Страница 8: ...he last frame s data while the other FIFO empties or fills with new USB data A single movx instruction transfers data between EZ USB endpoint FIFOs and external logic in two cycles or 330 nano seconds...

Страница 9: ...ike the FRW signal the FRD signal may be tailored for different interface requirements support extra features such as a second data pointer a second UART cycle stretched timing an expanded interrupt s...

Страница 10: ...ware Because of the flexibility of the external EEPROM and inter nal RAM manufacturers have the option to make last minute changes to a design code without impacting production schedules External mem...

Страница 11: ...ata integrity must be guaran teed but without critical delivery time The EZ USB family provides 14 bulk endpoints seven IN and seven OUT These endpoints can be programmed to be double buffered which i...

Страница 12: ...signals and provide a convenient interface to a logic analyzer C Compiler from Keil The C compiler from Keil Soft ware lets the designer write 8051 microcontroller applications in C and still get the...

Страница 13: ...are frame works With this library of predefined function calls devel opers can quickly develop their peripheral function The firm ware library includes functions such as ReNumeration I2 C programming...

Страница 14: ...nd Pin Definitions 1 10 10 9 90 13 45 12 95 8 00 REF 11 33 23 12 22 44 34 0 80 BSC 44 PQFP 2 35 MAX 0 45 0 30 0o 7o 1 00 0 80 1 95 0 15 80 Pin Lead Detail 2 7 6 2 6 6 0 28 0 18 8 Places 12o REF Base P...

Страница 15: ...o P d n u o r G d n a r e w o P d n u o r G d n a r e w o P d n u o r G d n a r e w o P 7 7 8 1 D N G A 0 1 0 1 1 2 C C V A 5 4 3 1 3 2 2 1 6 8 3 4 3 5 4 3 1 3 2 2 1 6 8 3 4 3 3 1 6 5 3 3 2 7 1 4 1 3...

Страница 16: ...10 Fax 408 943 6848 www cypress com Anchor Chips Incorporated 12396 World Trade Drive M S 212 San Diego CA 92128 Telephone 858 613 7900 Fax 858 676 6896 www anchorchips com A Business Unit of Cypress...

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