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Cypress 7C185-15, Техническое описание

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Cypress 7C185-15 Скачать руководство пользователя страница 11

CY7C185

 

Document #: 38-05043  Rev. *A

Page 11 of 11

Document History Page

Document Title: CY7C185 8K x 8 Static RAM
Document Number: 38-05043

REV.

ECN NO.

Issue 
Date

Orig. of 
Change

Description of Change

**

107145

09/10/01

SZV

Change from Spec number: 38-00037 to 38-05043

*A

116470

09/16/02

CEA

Add applications foot note to data sheet.

Содержание 7C185-15

Страница 1: ...dress pins A0 through A12 Reading the device is accomplished by selecting the device and enabling the outputs CE1 and OE active LOW CE2 active HIGH while WE remains inactive or HIGH Under these conditions the contents of the location ad dressed by the information on address pins are present on the eight data input output pins The input output pins remain in a high impedance state unless the chip i...

Страница 2: ...eter Description Test Conditions Min Max Min Max Unit VOH Output HIGH Voltage VCC Min IOH 4 0 mA 2 4 2 4 V VOL Output LOW Voltage VCC Min IOL 8 0 mA 0 4 0 4 V VIH Input HIGH Voltage 2 2 VCC 0 3V 2 2 VCC 0 3V V VIL Input LOW Voltage 3 0 5 0 8 0 5 0 8 V IIX Input Load Current GND VI VCC 5 5 5 5 µA IOZ Output Leakage Current GND VI VCC Output Disabled 5 5 5 5 µA IOS Output Short Circuit Current 4 VCC...

Страница 3: ... 300 300 mA ICC VCC Operating Supply Current VCC Max IOUT 0 mA 100 100 mA ISB1 Automatic Power Down Current Max VCC CE1 VIH or CE2 VIL Min Duty Cycle 100 20 20 mA ISB2 Automatic Power Down Current Max VCC CE1 VCC 0 3V or CE2 0 3V VIN VCC 0 3V or VIN 0 3V 15 15 mA Capacitance 5 Parameter Description Test Conditions Max Unit CIN Input Capacitance TA 25 C f 1 MHz VCC 5 0V 7 pF COUT Output Capacitance...

Страница 4: ...2 15 20 20 ns tAW Address Set up to Write End 12 15 20 25 ns tHA Address Hold from Write End 0 0 0 0 ns tSA Address Set up to Write Start 0 0 0 0 ns tPWE WE Pulse Width 12 15 15 20 ns tSD Data Set up to Write End 8 10 10 12 ns tHD Data Hold from Write End 0 0 0 0 ns tHZWE WE LOW to High Z 7 7 7 7 8 ns tLZWE WE HIGH to Low Z 3 5 5 5 ns Notes 6 Test conditions assume signal transition time of 5 ns o...

Страница 5: ...or CE2 going LOW The data input set up and hold timing should be referenced to the rising edge of the signal that terminates the write 14 During this period the I Os are in the output state and input signals should not be applied ADDRESS DATA OUT PREVIOUS DATA VALID DATA VALID tRC tAA tOHA Read Cycle No 1 10 11 50 50 DATA VALID tRC tACE tDOE tLZOE tLZCE tPU HIGH IMPEDANCE IMPEDANCE ICC ISB tHZOE t...

Страница 6: ... goes LOW simultaneously with WE HIGH the output remains in a high impedance state Switching Waveforms continued tWC tAW tSA tHA tHD tSD tSCE1 WE DATA I O ADDRESS CE1 DATA IN VALID tSCE2 CE2 rite Cycle No 2 CE Controlled 13 14 15 tHD tSD tLZWE tSA tHA tAW tWC tHZWE DATA IN VALID tSCE1 tSCE2 CE1 CE2 ADDRESS DATA I O WE Write Cycle No 3 WE Controlled OE LOW 13 14 15 16 NOTE 14 ...

Страница 7: ...T vs OUTPUT VOLTAGE 0 0 0 8 1 4 1 3 1 2 1 1 1 0 0 9 4 0 4 5 5 0 5 5 6 0 NORMALIZED t AA SUPPLY VOLTAGE V NORMALIZED ACCESS TIME vs SUPPLY VOLTAGE 120 140 100 60 40 20 0 0 1 0 2 0 3 0 4 0 OUTPUT SINK CURRENT mA 0 80 OUTPUT VOLTAGE V OUTPUT SINK CURRENT vs OUTPUT VOLTAGE NORMALIZED I I CC SB I CC VCC 5 0V VCC 5 0V TA 25 C VCC 5 0V TA 25 C I SB TA 25 C 0 6 0 8 0 3 0 2 5 2 0 1 5 1 0 0 5 0 0 1 0 2 0 3 ...

Страница 8: ...5PC P21 28 Lead 300 Mil Molded DIP Commercial CY7C185 15SC S21 28 Lead Molded SOIC CY7C185 15VC V21 28 Lead Molded SOJ CY7C185 15VI V21 28 Lead Molded SOJ Industrial 20 CY7C185 20PC P21 28 Lead 300 Mil Molded DIP Commercial CY7C185 20SC S21 28 Lead Molded SOIC CY7C185 20VC V21 28 Lead Molded SOJ CY7C185 20VI V21 28 Lead Molded SOJ Industrial 25 CY7C185 25PC P21 28 Lead 300 Mil Molded DIP Commercia...

Страница 9: ...CY7C185 Document 38 05043 Rev A Page 9 of 11 Package Diagrams 51 85014 B 28 Lead 300 Mil Molded DIP P21 28 Lead 300 Mil Molded SOIC S21 51 85026 A ...

Страница 10: ...miconductor does not authorize its products for use as critical components in life support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user The inclusion of Cypress Semiconductor products in life support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor agains...

Страница 11: ...ory Page Document Title CY7C185 8K x 8 Static RAM Document Number 38 05043 REV ECN NO Issue Date Orig of Change Description of Change 107145 09 10 01 SZV Change from Spec number 38 00037 to 38 05043 A 116470 09 16 02 CEA Add applications foot note to data sheet ...

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