CY7C1355C
CY7C1357C
Document #: 38-05539 Rev. *E
Page 13 of 28
TAP Timing
TAP AC Switching Characteristics
Over the Operating Range
[10, 11]
Parameter
Description
Min.
Max.
Unit
Clock
t
TCYC
TCK Clock Cycle Time
50
ns
t
TF
TCK Clock Frequency
20
MHz
t
TH
TCK Clock HIGH Time
20
ns
t
TL
TCK Clock LOW Time
20
ns
Output Times
t
TDOV
TCK Clock LOW to TDO Valid
10
ns
t
TDOX
TCK Clock LOW to TDO Invalid
0
ns
Set-up Times
t
TMSS
TMS Set-Up to TCK Clock Rise
5
ns
t
TDIS
TDI Set-Up to TCK Clock Rise
5
ns
t
CS
Capture Set-Up to TCK Rise
5
ns
Hold Times
t
TMSH
TMS Hold after TCK Clock Rise
5
ns
t
TDIH
TDI Hold after Clock Rise
5
ns
t
CH
Capture Hold after Clock Rise
5
ns
Notes:
10. t
CS
and t
CH
refer to the set-up and hold time requirements of latching data from the boundary scan register.
11. Test conditions are specified using the load in TAP AC Test Conditions. t
R
/t
F
= 1 ns.
t
TL
Test Clock
(TCK)
1
2
3
4
5
6
Test Mode Select
(TMS)
tTH
Test Data-Out
(TDO)
tCYC
Test Data-In
(TDI)
tTMSH
tTMSS
tTDIH
tTDIS
tTDOX
tTDOV
DON’T CARE
UNDEFINED
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