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CY7C1018DV33

Document #: 38-05465 Rev. *D

Page 8 of 9

© Cypress Semiconductor Corporation, 2006. The information contained herein is subject  to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be
used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Package Diagram

Figure 1. 32-pin (300-Mil) Molded SOJ (51-85041)

All product and company names mentioned in this document are the trademarks of their respective holders. 

PIN 1 I.D

0.330

0.292

0.340

0.305

0.128

0.140

0.810

0.830

0.260

0.275

0.026

0.014

0.032

0.020

DIMENSIONS IN INCHES

MIN.
MAX.

0.025

0.006

0.012

0.050

TYP.

MIN.

*

*

*

LEAD COPLANARITY 0.004 MAX.

51-85041-*A

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Содержание CY7C1018DV33

Страница 1: ...is then written into the location specified on the address pins A0 through A16 Reading from the device is accomplished by taking Chip Enable CE and Output Enable OE LOW while forcing Write Enable WE...

Страница 2: ...emperature VCC Speed Industrial 40 C to 85 C 3 3V 0 3V 10 ns DC Electrical Characteristics Over the Operating Range Parameter Description Test Conditions 10 Industrial Unit Min Max VOH Output HIGH Vol...

Страница 3: ...W JC Thermal Resistance Junction to Case 40 53 C W AC Test Loads and Waveforms 4 90 10 3 0V GND 90 10 ALL INPUT PULSES CAPACITIVE LOAD CONSISTS OF ALL COMPONENTS OF THE TEST ENVIRONMENT Rise Time 1 V...

Страница 4: ...h Z 7 8 5 ns Notes 5 Test conditions assume signal transition time of 3 ns or less timing reference levels of 1 5V input pulse levels of 0 to 3 0V 6 tPOWER gives the minimum amount of time that the po...

Страница 5: ...ad Cycle No 1 Address Transition Controlled 13 14 Read Cycle No 2 OE Controlled 14 15 3 0V 3 0V tCDR VDR 2V DATA RETENTION MODE tR CE VCC PREVIOUS DATA VALID DATA VALID RC tAA tOHA tRC ADDRESS DATA OU...

Страница 6: ...W tSA tPWE tHA tHD tSD tSCE tSCE CE WE DATA I O ADDRESS tHD tSD tPWE tSA tHA tAW tSCE tWC tHZOE DATAIN VALID NOTE 18 CE ADDRESS WE DATA I O OE Notes 16 Data I O is high impedance if OE VIH 17 If CE go...

Страница 7: ...C L H H High Z Selected Outputs Disabled Active ICC Ordering Information Speed ns Ordering Code Package Diagram Package Type Operating Range 10 CY7C1018DV33 10VXI 51 85041 32 pin 300 Mil Molded SOJ Pb...

Страница 8: ...s Furthermore Cypress does not authorize its products for use as critical components in life support systems where a malfunction or failure may reasonably be expected to result in significant injury t...

Страница 9: ...Offering in the Ordering Information B 262950 See ECN RKF Added Data Retention Characteristics table Added Tpower Spec in Switching Characteristics table Shaded Ordering Information C 307598 See ECN...

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