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AN2309 

 

 

November 25, 2007 

Document No. 001-17394 Rev. *B 

 - 6 - 

Device Schematic 

The schematics shown  in 

Figure  4

 on page  7 and 

Figure 5

 

on page 8 constitute a complete two-cell battery charger.  

A signal from the PWM goes to the RC-filter, which consists 
of  resistor  R4  and  capacitor  C4.  A  constant  voltage  signal 
proportional  to  the  PWM  duty  cycle  value  forms  at  the  Q2 
gate.  Therefore,  the  PWM  and  RC-filter  is  a  simple 
implementation of a PWM-DAC. The bipolar transistor Q2 is 
driven by an analog signal from the PWM-DAC. This bipolar 
transistor  and  resistors  R1  and  R5  form  a  resistive  divider. 
Therefore,  the  voltage  drop  on  the  resistor  R1  is  directly 
dependent  on  the  Q2  base  voltage;  that  is,  on  the  PWM-
DAC  level.  The  MOSFET  transistor  Q1  is  driven  by  the 
voltage drop on resistor R1 and regulates the battery charge 
current.  The  PWM  period  was  set  to  2048  for  an  accurate 
current  level  setting,  and  can  easily  be  adjusted  in  the 
firmware.  

Note  that  the  charger  proposed  in  this  application  note  is 
based on a linear current regulator.  The advantages of this 
regulator are low cost and small size. However, to charge a 
battery  with  a  capacity  of  over  1000  mAh  with  a  charge 
current  of  1  CA  (where  CA  is  the  nominal  battery  capacity) 
the  linear  regulator  can  be  nonoptimal  due  to  the  large 
voltage  drop  on  the  MOSFET  and  the  consequent  high 
MOSFET temperature. In this case, a step down regulator is 
preferable  to  a  linear  current  regulator.  The  step-down 
regulator is explained in detail in Application Notes 

AN2107

 

and 

AN2258

.   

Diode  D1  is  used  to  prevent  a  reverse  current  that  can 
discharge the battery when the charger is disconnected from 
the supply voltage. The cell-balancing circuit is represented 
by  MOSFETs  Q4  and  Q5,  and  by  balancing  resistors  R11 
and  R14.  The  MOSFETs  are  directly  controlled  from  the 
PSoC device port (high level - close, low level - open). The 
resistors R8-R10 and the bipolar transistor Q3 act as a level 
translator  and  allow  opening  the  MOSFET  Q4  by  a  logic 
signal from the PSoC.  

The  resistive  network  (R6,  R7,  R12,  R13,  R15,  R16,  and 
R18-R22) and the reference voltage 

V

bias

 from the divider on 

R29  and  D8,  allow  transformation  of  the  battery  current, 
voltage, and temperature into signals suitable for the PSoC 
device. The 100 

mΩ resistor R23 is a current-sense resistor 

that is in the battery pack current path. 

The  two-cell  charger  user  interface  uses  two  LEDs  to 
display  internal  status.  In  this  application  configuration,  the 
green LED indicates the charge phase, and the yellow LED 
indicates  the  discharge  phase.  The 

Error

  state  is  indicated 

when both LEDs are on and the idle status is indicated when 
both LEDs are off.  

To  provide  a  processor  power  supply  from  a  high  voltage 
level, the linear current regulator U2 is used. Alternatively, a 
switching  regulator  can  be  used,  as  explained  in 

AN2258

Or, the regulated step-down converter from an internal SMP 
can  be  used,  as  explained  in  AN2180,  “Using  the  PSoC 
Switch Mode Pump in a Step-Down 

Converter.” An external 

voltage  supply  is  applied  to  the  connector  J4.  The  SW1 
switch  allows  the  device  to  be  disconnected  from  the 
external power supply. Two diodes in the D6 package allow 
the  processor  to  operate  during  the  charge  phase  from  the 
external power supply and during the discharge phase from 
the  battery  pack  power  supply.  The  external  load  is 
connected  to  the  connector  J3  LOAD.  The  diodes  D4  and 
D5  provide  an  uninterrupted  power  supply  (UPS)  to  the 
LOAD  connector,  much  as  D6  provides  power  to  the 
processor.  The  switch-on  transistors  Q6  and  Q7  allow  the 
power supply to be disconnected from the LOAD connector 
and  protect  the  battery  from  overdischarge.  This  switch  is 
optional  and  can  be  removed  to  reduce  total  device  cost 
further. The ground level is connected to the external ground 
level POWER (during the charge phase or discharge phase) 
and  to  the  battery  pack  ground  that  follows  the  current-
sense resistor. Only in this way can the charge battery pack 
current  and  the  total  battery  pack  discharge  current  pass 
through  the  current-sense  resistor.  This  ground-level 
position  is  used  to  supplement  the  battery  fuel  gauging 
functionality in the PSoC software, as shown in 

AN2294

.  

 

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Содержание AN2309

Страница 1: ...cells causes the following problems Reduced overall battery pack capacity to the value of the cell with the least capacity During the charge process this cell reaches the maximum charge level before t...

Страница 2: ...e charge is Q I t C V Equation 2 Therefore Equation 1 can be transformed into the following equation 1 1 2 2 C V C V cell cell cell cell Equation 3 The value VcellN is the electrochemical potential of...

Страница 3: ...of battery charge discharge Thus it is advisable to perform the balancing routine when the cells are nearly fully charged or nearly fully discharged See also Cell Balancing Algorithm on page 14 The c...

Страница 4: ...device family for the same project the overnight conditioning cell balancing algorithm can easily be added see AN2258 Cell Balancing in a Multi Cell Li Ion Li Pol Battery Charger But for most applicat...

Страница 5: ...l1 VREF Vref Vref Vref Vbias C1 Q4 C4 R4 R10 Q3 R8 R9 Current Sense The following abbreviations are used in Figure 3 RS_TX RS232 transmitter for debug purposes uses external level translator It monito...

Страница 6: ...gnal from the PSoC The resistive network R6 R7 R12 R13 R15 R16 and R18 R22 and the reference voltage Vbias from the divider on R29 and D8 allow transformation of the battery current voltage and temper...

Страница 7: ...2 P2 6 23 P0 0 24 P0 2 25 P0 4 26 P0 6 27 Vcc 28 U1 CY8C24423A VCC V1 V2 Vi2 Vbias R24 10K 1 LED_GREEN R16 1M 1 R15 1M 1 R21 200K 1 R20 200K 1 C8 0 1u Vi1 Vi2 Vi1 R14 100 C6 0 01u R17 1M R13 150K 0 1...

Страница 8: ...set to 115200 baud The cell balancing MOSFETS Q4 Q5 are controlled directly from the CPU high level close low level open The three opamp topology of the instrumental amplifier INA is used in this imp...

Страница 9: ...d down battery charger divider resistors of large nominal resistance are employed To provide higher current measurement accuracy a current sense resistor was put in the pack current path close to the...

Страница 10: ...uring process by using external reference For temperature measurement a reference voltage resistive divider is employed based on a thermistor and a precision resistor R6 Thermistor resistance is calcu...

Страница 11: ...lgorithms are described Two Cell Battery Charger Algorithm The two cell battery charge algorithm is implemented in the charger firmware as a state machine The following states are used Initialization...

Страница 12: ...es jumps to the Wait For Temperature state when the battery temperature is outside the allowed temperature range For the Activation and Rapid states the allowed temperature range is the charge range F...

Страница 13: ...t Error State And Error Code Yes No Check Charge Terminate Condition Set Charge Complete State Yes No Set Initialization State No No Send Debug Data Check Cell Balancing Interval Cell Balancing Yes No...

Страница 14: ...its voltage has risen above 3 9 volts If the charging current is less than 1C this threshold can be reduced At this charge state the internal resistance drops below 0 2 and the distortion level is wit...

Страница 15: ...balancing profile examples are shown in the Appendix Figure 14 on page 19 and Figure 15 on page 20 Figure 11 Cell Balancing Algorithm Start Chagre Off Balancing Reset DoCellBalancing FALSE Wait Start...

Страница 16: ...ng Requirements TACT second Time Limit for Battery Activation Period TRAPID second Time Limit for Final Stage of Constant Charge Mode Voltage TCHARGE second Time Limit for Total Charge Period TTERM se...

Страница 17: ...arise in a battery pack with two cells in series By altering several configuration parameters the cell balancing algorithm can easily be adapted for various applications and selected batteries A metho...

Страница 18: ...ncing Profile Examples Figure 13 Charge Discharge Manager Profile Constant Current Charge Constant Voltage Charge Battery Discharge Cell Voltages Without Charge Interrupt Charger State Cell Balancing...

Страница 19: ...AN2309 November 25 2007 Document No 001 17394 Rev B 19 Figure 14 Cell Balancing Activity Profile Voltage Imbalance Value Cell Voltages With Charge Interrupt Feedback...

Страница 20: ...About the Author Name Oleksandr Karpin Title Application Engineer Background Oleksandr received a PhD s degree in computer science in 2008 from Lviv Polytechnic National University Ukraine His intere...

Страница 21: ...cal control or safety applications unless pursuant to an express written agreement with Cypress Furthermore Cypress does not authorize its products for use as critical components in life support syste...

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