Page 31
Macro-Tech 5002VZ
Power Amplifier
Reference Manual
also activated any time the first stage is about to be
overdriven. The compressor control circuit also sends
signals to the display module to indicate
IOC or input
overload.
The variable gain stage (U100B) sets the input sensitiv-
ity. Switch S100 is used to select 26 dB gain, 1.4 volts
or 0.775 volts sensitivity for standard 1 kHz power. From
there, variable resistor (R120) controls the gain.
The “error” amplifier (U105) is the heart of the unit. It is
located in the main feedback loop and controls the per-
formance of the amplifier. The error amp amplifies the
difference (“error”) between the output signal and the
input signal, and drives the voltage translator stage to
compensate for these differences.
The output of the error amplifier is then sent to the signal
translators (U106, U107, Q101, Q102, Q113 and Q114).
This stage translates the ground-referenced output of
the error amplifier to a V
CC
-referenced signal to drive the
last voltage amplifiers. The translators output drive is
controlled by the
ODEP circuit via Q101, Q102, Q113
and Q114.
The output of the signal translators next goes to the Last
Voltage Amplifiers or LVAs (Q501, Q502, Q503, Q507,
Q508 and Q509) located on the output module. The
output of the LVA stage is limited by D514 through D517
so that there is maximum current to feed the predriver
transistors and the slew limit capacitors (C506 and
C507) yielding a constant slew rate.
The output stage consists of the predrivers (Q504 and
Q510), the drivers (Q511 and Q512), and the outputs
(Q513 through Q518, Q536 and Q537). These devices
are configured as emitter-follower stages to supply cur-
rent gain to the output of the amplifier.
The bias servos (Q533 and Q505) are thermally
coupled to the heat sinks and set the quiescent current
point for the output stage to lower the distortion in the
crossover region of the output signal.
The bridge-balance circuit (U503) receives a signal
from the output of the amplifier and differences it with
the signal at the V
CC
supplies. The bridge-balance cir-
cuit then develops a voltage to drive the bridge-bal-
anced output stage. This results in the V
CC
supply
having exactly one half of the output voltage added to
their quiescent voltage. Q529 and Q530 along with
R556 set the quiescent current point for the bridge-bal-
ance output stage.
The protection mechanisms that affect the signal path
are implemented to protect the amplifier under real-
world conditions. These conditions are high instanta-
neous current, excessive temperature, and operation of
the output devices outside safe conditions.
The instantaneous current limiter (Q534, Q535, Q540
and Q541) has two distinct limiting points. The current
limit is nominally set to 55 amps and will switch to 32
amps when the V
CE
voltage exceeds a predetermined
level. When the output current exceeds the set limit,
drive is removed from the LVA stage, thus limiting the
output current to a safe level.
To further protect the output stages, a specially devel-
oped
ODEP circuit is used (U112, U113, U114, U116
and U117). It produces an analog output proportional
to the always changing safe operating area of the out-
put transistors. This output controls the translator stage
and the low-side predriver stage, removing any further
drive that may exceed the safe operating area of the
output stages.
Thermal sensors U500 and U501 give the
ODEP cir-
cuits vital information on the operating temperature of
the heat sink on which the output devices are mounted.
Should the amplifier fail in such a way that would result
in DC (caused by excessive current or voltage) across
the output terminals, the DC/low-frequency protection
circuit (U109C and U109D) senses this on the negative
feedback loop and shuts down the power supply and
all drive to the output stage until the DC is removed. If
an output device fails, the fault circuit (U115, Q105,
Q106, Q108 and Q109) detects the common-mode cur-
rent in the output devices and removes power from the
channel until it can be repaired.
The Loudspeaker Offset Integration or LOI circuit
(U104) senses the output signal and does a double in-
tegration, feeding the resultant “error” signal to the error
amplifier to correct for any net DC in the output.
Additional protection is provided by the overvoltage
protection circuit (U707D) which monitors the incoming
line voltage and shuts down both power supplies in the
case of excessive line voltage.
The VZ control circuit (U110) monitors both the V
CC
and
the output signal. When the output signal comes to
within a
∆
V of the V
CC
(as determined by the output volt-
age and current demands), the control circuit tells the
supply to switch into high-voltage mode. The supply is
then latched in this mode for a minimum of 50 micro-
seconds by U703. U711 provides protection for the
FETs. The FETs (Q810, Q811 and Q812) and the steer-
ing diodes (D810 and D811) provide the two modes of
the power supply.
