Theory of Operation 3-1
130485-1 Rev. B
CE 4000 Service Manual
©2002 Crown Audio, Inc.
3 Theory of Operation
WARNING:
All voltages on the primary side of the
flyback or bridge isolation transformers are not
referenced to ground. They are referenced to the
mains. When measuring these voltages with mains
voltage applied, always use an isolation transformer to
provide the mains voltage (and tie SMPSREF to signal
ground) or use an isolated differential probe.
3.1 Audio Signal Path
For the sake of simplicity, only channel one of the
audio signal path is described.
3.1.1 Input Stage
Signal is presented to the CE4000 through one of
three connectors when using the standard input
module. Each channel is outfi tted with a balanced XLR
/ phone jack, and a barrier strip. These connectors
are wired in parallel, which allows daisy chaining
when needed. The incoming shield is tied to ground
through an 82-Ohm resistor (R607) in parallel with a
0.1uF cap (C605) for the purpose of inhibiting ground
loop circulating currents and RFI protection. The
signal is then converted from balanced to unbalanced
in the Balanced Input Stage where it receives further
RFI protection. Input impedance is 20k Ohm balanced
and 10k Ohm unbalanced. Signal then fl ows into
the Variable Gain Stage where the front panel level
controls are allowed to affect the gain.
The CE4000 amplifi er comes with three input sensitiv-
ity selections: 0.775V, 1.4V, and fi xed 26dB gain set
by a switch on the Bridge/Fault/Gain (BFG) PWA.
With the gain switch (S1) in the 0.775V position, R6
sets the gain while in the 1.4V position R5 in parallel
with R6 set the gain. In the 26dB position, R4 in
parallel with R6 set the gain. The signal is then put
under the control of a full-time compressor circuit
comprised of a symmetrical window detector, a buffer
amplifi er, and the gating op-amp which uses several
small components to set the compressor’s attack and
decay characteristics. These components are found
on the large main PWA. The actual compressing is
accomplished by an opto-isolator (U1) on the BFG
PWA that affects the gain in the signal path.
The signal then is passed through a series of switch-
able filters that allow the signal to be low pass
and high pass fi ltered at various frequencies. The
switches are located at the back panel. The low pass
fi lter is a fourth-order Linkwitz-Riley type and the
high pass filter is a third-order Butterworth type.
These switches (S3 for the low pass and S5 for the
high pass) and their necessary circuitry are found
on the BFG PWA.
Inherent in all PWM amplifi ers is a rise in gain at
higher frequencies. Because of this, a 32 kHz 7th-
order Gaussian low pass fi lter has been included in
the input stage of the CE4000 (on the main PWA). The
Gaussian fi lter-type is unique in that it has minimal
ringing and excellent phase response so even a
high-order fi lter such as this one does not adversely
affect the sonic excellence of the product. U111-A,
-B, -C and –D comprise this fi lter while U110-B and
R178 form the gain calibration stage for this 7th
order fi lter.
3.1.2 Error Amplifi er
The signal next enters the main amplifi er error amp
(U100-C) where it is mixed with a small portion of
the output voltage and current in such a way as to
control the amplifi er’s overall output performance.
From the error amplifi er, the signal is divided and
fed to the modulator. Since the modulator circuit is
balanced, the drive signal for the positive modulator
is inverted by U100-D.
3.1.3 Modulator
U101 and U103 are high-speed differential compara-
tors. U101 is the positive comparator and U103 is the
negative comparator. The comparator section has
two outputs: inverting and non-inverting. The output
is therefore balanced. The audio signal is applied to
the inverting input of both differential comparators
(with the positive modulator receiving the audio 180
degrees out of phase from the negative modulator).
The 250 kHz triangle wave (described below) is
applied to the non-inverting input of both differential
comparators. With no audio signal, the bipolar triangle
wave is therefore compared to a zero-volt signal
and this results in a 250 kHz square wave pulse
train that is passed to the NAND gate section of the
differential comparator.
Each NAND gate has two inputs: the modulated
signal from the high speed comparator section and
the current limiter detect signal from U106-A. In the
event of over-current, the current limiter signal is
shut off disabling the NAND gates. This results in no
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