Corelis PCIe-1149.1 Скачать руководство пользователя

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1-10 Product

Overview

Power Short Test Pins

Power (Vcc) Sense Pins

2 per TAP connector (Vcc1, Vcc2), 8 total

Vcc Measurement Type

Short to GND detect, Target un-Powered,

Voltage sense/measurement of +/- 50 VDC

Voltage Sense Resolution

12-bit ADC

Voltage Sense Accuracy

+/- 50 mV

Physical

Box Outline Dimensions

4.00 in. × 4.60 in. × 0.75 in.

Power Requirements

No external supply needed

Power is provided by the host controller

Operating Environment

Temperature 0



C to 55



Relative Humidity

10% to 90%, non condensing

Storage Environment

Temperature -40



C to 85



Содержание PCIe-1149.1

Страница 1: ...1149 1 High Speed PCI Express Bus Boundary Scan Controller User s Manual Document Part Number 70369 REV B Copyright 2006 2007 Corelis Inc 12607 Hidden Creek Way Cerritos CA 90703 2146 Telephone 562 9...

Страница 2: ......

Страница 3: ...document is subject to change without notice CORELIS shall not be liable for errors contained herein for incidental or consequential damages in connection with the furnishing performance or use of ma...

Страница 4: ...the Buyer Buyer supplied software or interfacing unauthorized modification or misuse operation outside of the environmental specifications for the product or improper site preparation or maintenance...

Страница 5: ...TARGET 3 1 Connecting to the Target 3 1 20 Pin ScanTAP Connector 3 3 68 pin Host Connector 3 4 PCIe 1149 1 Parallel I O Connectors 3 5 CHAPTER 4 USING PCIE 1149 1 WITH SCANPLUS 4 1 Hardware Setup 4 1...

Страница 6: ...iv APPENDIX B SELF TEST UTILITY SOFTWARE 1 Self Test 1...

Страница 7: ...Figure 4 10 ScanPlus Runner Test Plan for Gang Programming 4 14 Figure 4 11 ScanPlus Runner Pop up Menu 4 15 Figure 4 12 Infrastructure Test Options Dialog Box 4 16 Figure 4 13 Available ScanTAP 4 TA...

Страница 8: ...lel Input Pin Assignment 3 6 Table 4 1 ScanPlus Runner ScanTAP 4 Configuration 4 7 Table 4 2 ScanPlus Runner Naming Conventions 4 8 Table 4 3 ScanPlus Runner Naming Conventions for Gang Programming 4...

Страница 9: ...le boundary scan JTAG Test Access Ports TAPs using any of the Corelis ScanTAP family of Multiple TAP Intelligent pods such as the ScanTAP 4 ScanTAP 8 or ScanTAP 32 The PCIe 1149 1 is shown in Figure 1...

Страница 10: ...trol and observe each functional pin of the IC via the four wire interface A controller can load test debug or initialization patterns serially into the appropriate IC s via the IEEE Standard 1149 1 t...

Страница 11: ...ovides scan data storage and can store the entire scan data for maximum performance real time scan operations A test system accesses the TAP controller and its associated memory through the host PCI E...

Страница 12: ...ay An auxiliary feature of the PCIe 1149 1 is the target power shorted detector for two voltages sense target interface pins With the target un powered this mechanism effectively measures the impedanc...

Страница 13: ...No external power supply is required the PCIe 1149 1 card supplies it Differential signal driving supports cables of up to 30 feet Automatic delay mechanisms compensate for transport delays through th...

Страница 14: ...m scanning data length unlimited Physical Card Outline Dimensions PCB 3 875 0 25 inches 6 75 0 25 inches I O Connectors P3 Boundary scan Connector 68 pin SCSI II type AMP P N 787171 7 or equivalent P1...

Страница 15: ...ity of the PCIe 1149 1 Maximum scanning data length unlimited Programmable Interface Voltage 1 25 to 3 3 V in 0 05 V increments Programmable TAPs 4 each TAP can have its own programmable voltage setti...

Страница 16: ...tics See Table 1 3 Symbol Test Conditions Limit Min Limit Max Units VIH Vdd Adjust 2 5 V 2 Vdd 0 5 V Vdd Adjust 2 50 V 0 65 Vdd Vdd 0 5 V VIL Vdd Adjust 2 00 0 7 V Vdd Adjust 2 0 0 35 Vdd V VOH IOH 2...

Страница 17: ...puts and the SDA SCL signals must be pulled up to 3 3V VDD by the target SCL frequency 100 kHz Signal DC Characteristics See Table 1 4 Symbol Test Conditions Limit Min Limit Max Units VDD 3 0 3 6 V VI...

Страница 18: ...sense measurement of 50 VDC Voltage Sense Resolution 12 bit ADC Voltage Sense Accuracy 50 mV Physical Box Outline Dimensions 4 00 in 4 60 in 0 75 in Power Requirements No external supply needed Power...

Страница 19: ...Cable 6 foot 68 pin SCSI type one to one Cable Corelis P N 15314 A set of four 20 pin to 10 pin TAP cables Corelis P N 15310 NOTE The actual hardware shipped to the customer may vary depending on the...

Страница 20: ...nstalled with the ScanPlus Application Software Windows will automatically recognize and configure the PCIe 1149 1 the first time it is detected in your system WARNING You MUST install the software fi...

Страница 21: ...w to firmly attach the PCIe 1149 1 card bracket to the PC chassis Close the PC enclosure apply power and verify that the PC boots up correctly Preserve the original packing material for future shipmen...

Страница 22: ...2 4 PCIe 1149 1 Installation...

Страница 23: ...connectors to mating connectors on the target The ScanTAP 4 connects to the target via the supplied 1 1 TAP flat cables P N 15310 15311 or 15312 Figure 3 1 shows the top view of the ScanTAP 4 box inc...

Страница 24: ...TAP4 when the target has 4 TAP interface connectors To connect the TAP connector s to the target UUT Make sure that the target power is OFF Make sure that the ON blue LED on top of the ScanTAP 4 is i...

Страница 25: ...t to the UUT 1K pull up 2 GND 3 TDI Input to the UUT 1K pull up 4 GND 5 TDO Output of the UUT 33 ohm series 6 GND 7 TMS Input to the UUT 1K pull up 8 GND 9 TCK Input to the UUT 1K pull up 10 GND 11 Wr...

Страница 26: ...ed for Flash programming and if used will override the Parallel Output GPIO3 function Refer to the ScanPlus Flash Programmer manual for further information about this function The ScanTAP 4 comes stan...

Страница 27: ...3 3 Data Bus Alignment Signal Name Output Connector D0 PORTA_OUT0 P2 1 D1 PORTA_OUT1 P2 3 D2 PORTA_OUT2 P2 5 D3 PORTA_OUT3 P2 7 D4 PORTA_OUT4 P2 9 D5 PORTA_OUT5 P2 11 D6 PORTA_OUT6 P2 13 D7 PORTA_OUT7...

Страница 28: ...D3 PORTA_IN3 P1 7 D4 PORTA_IN4 P1 9 D5 PORTA_IN5 P1 11 D6 PORTA_IN6 P1 13 D7 PORTA_IN7 P1 15 D0 PORTB_IN0 P1 17 D1 PORTB_IN1 P1 19 D2 PORTB_IN2 P1 21 D3 PORTB_IN3 P1 23 D4 PORTB_IN4 P1 25 D5 PORTB_IN...

Страница 29: ...1149 1 with ScanPlus Tools The PCIe 1149 1 card is compatible with ScanPlus Runner ScanPlus Debugger and ScanPlus Flash Programmer The following steps are provided for ScanPlus Runner Selecting the ca...

Страница 30: ...oller in the Current Controller box If ScanPlus Runner cannot find the controller it displays an error dialog 5 Once ScanPlus Runner finds the PCIe 1149 1 controller if for some reason the ScanTAP 4 i...

Страница 31: ...displays a screen similar to Figure 4 3 Note that saving the test plan tsp file in ScanPlus Runner FILE menu also saves the settings in the system registry The next time the tsp file is loaded into Sc...

Страница 32: ...Ps use the same voltage settings for all the TAPs it is not uncommon to find targets that use for example the 3 3 V setting for one TAP 2 5 V for another and 1 8 V for one or two additional TAPs The A...

Страница 33: ...cting which of the 4 ScanTAP 4 TAPs to use for connecting to the target Method 2 Embedding the TAP selection text as part of the test step file name This method is explained below and is primarily sup...

Страница 34: ...is the preferred and most straightforward method for selecting which of the 4 ScanTAP 4 TAPs to use for connecting to the target This feature is available in all relevant ScanPlus Tools including Scan...

Страница 35: ...P2 only TAP2 only 3 Enable TAP3 only TAP3 only 4 Enable TAP4 only TAP4 only 1 2 Serialize TAPs 1 through 2 TAPs 1 and 2 in series 1 2 3 Serialize TAPs 1 through 3 TAPs 1 2 and 3 in series 1 2 3 4 Seri...

Страница 36: ...gh 2 TAPs 1 and 2 in series _TAP1 2 3 Serialize TAPs 1 through 3 TAPs 1 2 and 3 in series _TAP1 2 3 4 Serialize TAPs 1 through 4 TAPs 1 2 3 and 4 in series Table 4 2 ScanPlus Runner Naming Conventions...

Страница 37: ...s available in the ScanPlus Runner Options menu Use this method only when specific test step s require TAP configuration settings different from the global settings selected in Method 1 A typical Scan...

Страница 38: ...then clicking once with the left mouse button The test step is now highlighted Right click on the test step name to bring up a pop up menu and select Options as shown in Figure 4 7 Figure 4 7 ScanPlu...

Страница 39: ...r The appearance of the dialog box varies with the type of test step selected Figure 4 8 illustrates an options dialog for an infrastructure test step Consult the ScanPlus Runner User s Manual for mor...

Страница 40: ...eck box and select the desired programming topology configuration from the drop down list Figure 4 9 shows the selections available from the configuration drop down list Figure 4 9 Available ScanTAP 4...

Страница 41: ...the file name for various cases File Name ID Meaning TAP s Enabled _TAP1 2 Enable TAPs 1 through 2 Gang Programming of TAP1 and TAP2 _TAP1 3 Enable TAPs 1 through 3 Gang Programming of TAP1 TAP2 and...

Страница 42: ...h 4 then it programs the Flash memory in parallel on all four targets Note that for files that already contain a suffix the file name ID is inserted between the suffix and the rest of the file name Fo...

Страница 43: ...The Options dialog provides an alternate way to specify gang programming from ScanPlus Runner Right click on the test step name to bring up a pop up menu and select Options as shown in Figure 4 11 Fig...

Страница 44: ...ies with the type of test step selected Figure 4 12 illustrates an options dialog for an infrastructure test step Consult the ScanPlus Runner User s Manual for more information on the Options dialog b...

Страница 45: ...following ScanTAP configuration check box and select the desired programming topology configuration from the drop down list Figure 4 13 shows the selections available from the configuration drop down...

Страница 46: ...fpi programming test steps These additional configuration options are only available for Gang Flash programming of fpi files and is not shown for regular test steps cvf files See Figure 4 14 Figure 4...

Страница 47: ...e in the drop down list Configuration Meaning TAP s Enabled 1 2 Enable TAPs 1 through TAP2 in parallel Gang TAPs 1 and 2 are active 1 3 Enable TAPs 1 through TAP3 in parallel Gang TAPs 1 2 and 3 activ...

Страница 48: ...Generator generates Gang programming applies the same fpi file to identical targets concurrently via separate TAP connections Invoke ScanPlus Flash Programmer select the Setup menu item and the Gang P...

Страница 49: ...n a log file if you have the ScanPlus Runner ADO and then terminate The following table shows the controller identifiers and associated parameters Consult the ScanPlus Runner User s Manual for more de...

Страница 50: ...12 226 227 233 12 25 MHz 0 25 MHz increment 6 25 MHz 6 125 MHz 0 125 MHz increment 5 MHz 4 9 MHz 0 1 MHz increment 2 5 MHz 2 45 MHz 0 05 MHz increment 1 25 MHz 1 225 MHz 0 025 MHz increment 625 MHz 60...

Страница 51: ...are for PCIe 1149 1 without ScanTAP only 3 0 Clock Delay 0 5 clock increment 14 5 Clock Delay 15 0 Clock Delay 4 Input Threshold 1 2 Automatic Use advanced input threshold settings in position 11 thr...

Страница 52: ...05 V per step 3 20 V 3 25 V 3 30 V 9 TAP3 Voltage 1 2 3 40 41 42 1 25 V 1 30 V 1 35 V 0 05 V per step 3 20 V 3 25 V 3 30 V 10 TAP4 Voltage 1 2 3 40 41 42 1 25 V 1 30 V 1 35 V 0 05 V per step 3 20 V 3...

Страница 53: ...ion use this controller specification string controller PCIe 1149 1 42 196 1 To select a PCIe 1149 1 ScanTAP4 controller card with all TAP voltages of 3 30 V TCK frequency of 1 MHz automatic delay com...

Страница 54: ......

Страница 55: ...with most standard test equipment The TAP contains 5 signals TCK TMS TDO TDI and optionally TRST It also contains ground signal s Corelis recommends the standard TAP connector shown in Figure A 1 whic...

Страница 56: ...UUT 1K pull up 10 GND Note Some target boards may require a pull down resistor on the TRST signal to assure normal device operations when not in boundary scan test mode Table A 1 Signal Description an...

Страница 57: ...responding to the interface voltage programmable on the PCIe 1149 1 from 1 25 to 3 3 V Recommended resistor values are 5 Vcc Vcc Vcc Vcc Figure A 2 TAP Connector Schematic 1K 33 1K 1K 1K TDI TMS TCK T...

Страница 58: ...14 Do Not Connect Ready Busy 15 16 Do Not Connect Figure A 3 Boundary scan Flash Programming 16 Pin TAP Connector top view Corelis Flash Programming software supports the external signals Write_Strobe...

Страница 59: ...the UUT 1K pull up or 1 5K pull down 2 GND 3 TDI Input to the UUT 1K pull up 4 GND 5 TDO Output from UUT 33 ohm series 6 GND 7 TMS Input to the UUT 1K pull up 8 GND 9 TCK Input to the UUT 1K pull up...

Страница 60: ...ded resistor values are 5 Vcc Vcc Vcc Vcc 1K 33 1K 1K 1K TRST TDI TMS TCK TDO 1 3 5 7 9 2 4 6 8 TAP Connector To all Boundary Scan Devices To TDI of 1st Device in the chain To all Boundary Scan Device...

Страница 61: ...SDO GPIO3 15 SPI_SCK GPIO2 13 Write_Strobe GPIO1 SPI_CS2 11 TCK 9 TMS 7 TDO 5 TDI 3 TRST 1 Figure A 5 Boundary scan Flash Programming 20 Pin TAP Connector top view Corelis Flash Programming software s...

Страница 62: ...K pull down 2 GND 3 TDI Input to the UUT 1K pull up 4 GND 5 TDO Output from UUT 33 ohm series 6 GND 7 TMS Input to the UUT 1K pull up 8 GND 9 TCK Input to the UUT 1K pull up 10 GND 11 Write_Strobe GPI...

Страница 63: ...Target Connectors A 9 17 VCC1 UUT Power Test Point 18 I2C_SCL Input to the UUT 1K pull up 19 VCC2 UUT Power Test Point 20 SPI_CS1 I2C_SDA Input to the UUT 1K pull up Table A 6 Signal Description and...

Страница 64: ...Test Point 2 SPI_SDI SPI_CS1 1K 1K 1K 1K 1K 1K 1K to all bounday scan devices to SPI device s to SPI device to TDI of first device in the chain to all bounday scan devices to all bounday scan devices...

Страница 65: ...Strobe GPIO1 Ready_Busy GPIO3 GPIO2 UUT Power Test Point 1 UUT Power Test Point 2 I2C_SCL I2C_SDA 1K Vcc 1K Vcc 1K Vcc 1K Vcc 1K Vcc 1K Vcc 1K Vcc to all bounday scan devices to I2C devices to I2C dev...

Страница 66: ......

Страница 67: ...you suspect that the board is damaged you can run the self test on the PCIe 1149 1 card The self test utility is installed on your computer in the same folder where ScanPlus Applications ScanPlus Run...

Страница 68: ...Figure B 1 Self Test Result for the PCIe 1149 1 when the ScanTAP 4 is NOT connected B 2 Self Test Utility Software...

Страница 69: ...Self Test Utility Software B 3 Figure B 2 Self Test Results for the PCIe 1149 1 with the ScanTAP 4 Connected...

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