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Overview
950-719-111-03, Revision 03
2
June 29, 2000
PCS-719 List 1A
C
OMPOSITE
C
LOCK
S
IGNALS
Composite clock signals are a 64 kHz bipolar clock with 8 kHz bipolar violations, that define the bit and byte
boundaries of DDS data as it is transferred within a CO. In support of DDS interfaces, PG-Plus defines two
composite clock interfaces at the PAU/PMU card slot. The PAU/PMU selects the clock and translates it into bit
and byte clocks, which it then distributes to the COLUs. Wire-wrap pins on the backplane allow the composite
clock source to be terminated or daisy-chained to another shelf.
B
ACKPLANE
C
ONNECTIONS
Each shelf supports the connection of up to sixteen COLUs or six FICOLUs, two PMX units, and one PAU or
PMU. The backplane of the PCS-719 List 1A contains the connectors shown in
and
external to the COT shelf should follow the provisions of the current edition of the National Electrical Code and
applicable local codes.
Figure 2.
PCS-719 Shelf Backplane
Information in Tables 2 through 21 can be used for diagnostic and troubleshooting procedures
under the direction of an authorized PairGain technical support representative.