Contec SPI-Q6700-LLVA, Руководство пользователя

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BIOS
3.8 AMI BIOS Checkpoints
The Bootblock initialization code sets up the chipset, memory and other
components before system memory is available. The following table describes
the type of checkpoints that may occur during the bootblock initialization
portion of the BIOS
(Note)
:
Checkpoint Description
Before D0
If boot block debugger is enabled, CPU cache-as-RAM
functionality is enabled at this point. Stack will be enabled
from this point.
D0
Early Boot Strap Processo (BSP) initialization like microcode
update, frequency and other CPU critical initialization. Early
chipset initialization is done.
D1
Early super I/O initialization is done including RTC and
keyboard controller. Serial port is enabled at this point if
needed for debugging. NMI is disabled. Perform keyboard
controller BAT test. Save power-on CPUID value in scratch
CMOS. Go to flat mode with 4GB limit and GA20 enabled.
D2
Verify the boot block checksum. System will hang here if
checksum is bad.
D3
Disable CACHE before memory detection. Execute full
memory sizing module. If memory sizing module is not
executed, start memory refresh and do memory sizing
in Boot block code. Do additional chipset initialization.
Re-enable CACHE. Verify that flat mode is enabled.
D4
Test base 512KB memory. Adjust policies and cache first
8MB. Set stack.
D5
Bootblock code is copied from ROM to lower system
memory and control is given to it. BIOS now executes out of
RAM. Copy compressed boot block code to memory in right
segments. Copy BIOS from ROM to RAM for faster access.
Perform main BIOS checksum and update recovery status
accordingly.
3.8.1 Bootblock Initialization Code Checkpoints