PO-32L(PC)V
Ver.1.30
3
I/O Address Setting
Use the on-board DIP switches (SW1 and SW2) to set the I/
O base address of your board. Individual bits in SW1 and
SW2 correspond to the 15 high-order bits (A15 to A1) in the
I/O base address.
Always set A1 to A0 to "0" (OFF) for the board.
A7
A6
A5
A4
A3
A2
A1
A0
B in a r y
H exa d ecim a l
0
0
0
0
0
0
0
1
1
3
0
0
0
0
0
0
0
0
0
0
A15 A1 4 A13 A12
A11 A1 0 A9
A8
1
2
3
4
5
6
7
8
O
F
F
S W 1
1
2
3
4
5
6
7
8
O
F
F
S W 2
The figure shows that the head I/O Address is set as 0300H
by a diagram, and this board occupies the I/O Address of
0300H-0301H.
I/O Port Bit Assignment
Output Port Bit Assignments
When "1" is output to a bit, the corresponding output data is
set to "ON." If "0" is output to the bit, the data is set to
"OFF."
Block Diagram
I /O base
addr ess
D 7
D 6
D 5
D 4
D 3
D 2
D 1
D 0
+0H
+1H
Oxx i s an ou t put si gn al name; nu m ber s i n br ack et s [ ]
ar e connect or pi n n um ber s.
+2H
+3H
O00
O10
O20
O30
[29]
[21]
[10]
[2]
O01
O11
O21
O31
[30]
[22]
[11]
[3]
O02
O12
O22
O32
[31]
[23]
[12]
[4]
O03
O13
O23
O33
[32]
[24]
[13]
[5]
O04
O14
O24
O34
[33]
[25]
[14]
[6]
O05
O15
O25
O35
[34]
[26]
[15]
[7]
O06
O16
O26
O36
[35]
[27]
[16]
[8]
O07
O17
O27
O37
[36]
[28]
[17]
[9]
Ou t put Gr oup 0 (+0 por t )
Ou t put Gr oup 1 (+1 por t )
Ou t put Gr oup 2 (+2 por t )
Ou t put Gr oup 3 (+3 por t )
DI P
swit ch
Dat a
dr i ver
Cont r ol
ci r cui t
PO-32L (PC)V
I /O address
coincidence
ci r cuit
Addr ess bus
(A15~A0)
I OR
I OW
AEN
RESET
Dat a bus
(D7~D0)
P
C
/A
T
I/
O
e
x
p
a
n
s
io
n
b
u
s
Photo-
coupler
&
Tr an-
si st or
Ext er nal di git al out put
(8ch, gr oup 2)
Ext er nal di git al out put
(8ch, gr oup 3)
Photo-
coupler
&
Tr an-
si st or
Photo-
coupler
&
Tr an-
si st or
Ext er nal di git al out put
(8ch, gr oup 0)
Ext er nal di git al out put
(8ch, gr oup 1)
Photo-
coupler
&
Tr an-
si st or
