6. Appendix
122
BX710 series User’s Manual
Table 6.6. Function of Each Register < 3 / 4 >
MCR: Modem Control Register
D7
D6
D5
D4
D3
D2
D1
D0
03FCH
I/O address
Description
0 : Inactive
[HIGH]
1 : Active
[LOW]
0
0
0
Loop IRQ
X
RTS DTR
DTR
RTS 0 : Inactive
[HIGH]
1 : Active
[LOW]
Interrupt control bit
0 : Disable
1 : Enable
Diagnostic local loop-back test
0 : Disable
1 : Enable
LSR: Line Status Regester
03FDH
D7
D6
D5
D4
D3
D2
D1
D0
0
TEMT THRE
BI
FE
PE
OE
DR
Data ready
(1 for existence of received data)
Overrun error
(1 for occurrence of an error)
Parity error (1 for occurrence of an error)
Framing error (1 for occurrence of an error)
Break interrupt (1 for detection of break state)
Transmitter holding register empty
(1 for transmission buffer being empty)
Transmitter empty
(Set to 1 when both transmitter holding register and
transmitter shift register are empty.)
Содержание BX710 Series
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