Copyright
©
2010
congatec
AG
QTOPm14
59/80
Table 35
IRQ Lines in APIC mode
IRQ# Available
Typical Interrupt Source
Connected to Pin / Function
0
No
Counter 0
Not applicable
1
No
Keyboard
Not applicable
2
No
Cascade Interrupt from Slave PIC
Not applicable
3
Yes
LPC bus via SERIRQ
4
Yes
LPC bus via SERIRQ
5
Yes
LPC bus via SERIRQ
6
Yes
LPC bus via SERIRQ
7
Yes
LPC bus via SERIRQ
8
No
Real-time Clock
Not applicable
9
Yes
Generic
LPC bus via SERIRQ, option for SCI
10
Yes
LPC bus via SERIRQ
11
Yes
LPC bus via SERIRQ
12
No
LPC bus via SERIRQ (Exclusively)
13
No
Math processor
Not applicable
14
Yes
LPC bus via SERIRQ
15
Yes
LPC bus via SERIRQ
16
Yes
Integrated graphics device, HDA controller, PCIe Bridge 0, PCIe Port 1 Slot, PCIe Port 2 Slot, PCIe Port 3 Slot, PCIe
Root Port 0, PCIe Root Port 1, PCIe Root Port 2, PCIe Root Port 3
17
Yes
PCIe Bridge 0, PCIe Port 1 Slot, PCIe Port 2 Slot, PCIe Port 3 Slot
18
Yes
PCIe Bridge 0, PCIe Port 1 Slot, PCIe Port 2 Slot, PCIe Port 3 Slot
19
Yes
PCIe Bridge 0, PCIe Port 1 Slot, PCIe Port 2 Slot, PCIe Port 3 Slot
20
No
21
No
22
No
23
No