Copyright
©
2014
congatec
AG
TA30m16
19/95
3
Block Diagram
Intel Bay Trail SoC
COMPUTE UNIT
Core #1
Core #2
Core #3
Core #4
Tri-gate 3-D 22nm Quad core SoC
1MB L2 cache shared by 2 cores
PROCESSOR CORE
SSE4.2
AES
AVX
VT-x
SoC TRANSACTION ROUTER
Interfaces
Mul�media Features
DisplayPort
TMDS
VGA
LVDS
MPEG-2
H.264
DirectX 11 OpenGL 3.0
OpenGLES 2.0
OpenCL 1.2
WMV9
SVC
WMV
SAMU
MVC
DivX
low powe
r
high pe
rformance
MEMORY CONTROLLER
(1066 or
1333 MT/
s)
DISPLAY & GRAPHICS
SATA
USB 2.0
LPC Bus
PCIe
Integrated I/O Interfaces
GPIOs
SPI
HD Audio
PCU
USB 3.0
INTEGRATED I/O
PCIe1 x1
PCIe2 x1
PCIe3 x1
SD Card
PCIe0 x1
2x SATA 3G
4x USB 2.0
4x USB 2.0
1x SuperSpeed
X
X
X
X
X
X
X
X
X
LVDS/eDP
First DDI
Second DDI
1
Dual Channel Non-ECC
DDR3L-1333 MT/s
NOTE:
1
The Bay Trail SoC does not support mixed raw cards or
mixed memory sizes. Therefore use only symmetrical
non-ecc memory modules.
2
The conga-TCA3 offers either DDI2 or LVDS/eDP on the
Digital Display Port 2, but not both.
eMMC 4.5
eD
P Assembly Op�on
LPC
PCIe Switch
DP Switch
SSD
TPM
MUX
PCIe to GBE
Intel l210
USB HSIC
4 Port Hub
congatec
Board Controller
eDP to LVDS
NXP PTN3460
RES
Ethernet
LVDS/eDP
COM Express 2.1
Type 6
A-B Connector
LPC Bus
SPI Bus
HDA I/F
USB 2.0 Port 0..3
USB 2.0 Port 4..7
CRT
SATA Port 0..1
SATA Port 2..3
I2C Bus
LID#/SLEEP#
SM Bus
Fan Control
SDCard/GPIOs
PCIe Port 5
PCIe Port 2
PCIe Port 3
PCIe Port 4
PCIe Port 1
PCIe Port 0
COM Express 2.1
Type 6
C-D Connector
USB 3.0 Port 0
USB 3.0 Port 1
USB 3.0 Port 2
USB 3.0 Port 3
(TX BC)
congatec custom
PCIe Port 6
PCIe Port 7
PEG x16
DP++ (DP/HDMI/DVI)
DP++ (DP/HDMI/DVI)
2
DDI3
2x UART