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FACE MODULE Connectors 

Revised February 2012 

FACE Module Design Guide 

     

13

 

 

 

Table 13      PX2 connector pin-out 

Pin 

Signal Name 

Pin 

Signal Name 

A1 

GND 

B1 

GND 

A2 

RESERVED 

B2 

RESERVED 

A3 

RESERVED 

B3 

PCIE_P2_TX_N 

A4 

FCH_GPIO145_OD 

B4 

FCH_GPIO0 

A5 

RESERVED 

B5 

RESERVED 

A6 

RESERVED 

B6 

RESERVED 

A7 

GND 

B7 

GND 

A8 

NC 

B8 

NC 

A9 

NC 

B9 

NC 

A10 

FCH_GPIO146_OD 

B10 

FCH_GPIO1 

A11 

NC 

B11 

NC 

A12 

NC 

B12 

FCH_GPIO4

 

A13 

GND 

B13 

GND 

A14 

FCH_GPIO144_OD

 

B14 

FCH_GPIO5

 

A15 

FCH_GPIO147_OD

 

B15 

FCH_GPIO6

 

A16 

FCH_GPIO149_OD

 

B16 

FCH_GPIO3

 

A17 

FCH_GPIO129_OD

 

B17 

FCH_GPIO7

 

A18 

FCH_GPIO130_OD

 

B18 

FCH_GPIO8

 

A19 

5V_S5 

B19 

5V_S5 

A20 

FCH_GPIO201

 

B20 

FCH_GPIO9

 

A21 

FCH_GPIO202

 

B21 

FCH_GPIO10

 

A22 

FCH_GPIO150_OD

 

B22 

NC 

A23 

FCH_GPIO204

 

B23 

FCH_GPIO11

 

A24 

FCH_GPIO205

 

B24 

FCH_GPIO12

 

A25 

GND 

B25 

GND 

A26 

NC 

B26 

PCIE_CLK2_P 

A27 

NC 

B27 

PCIE_CLK2_N 

A28 

NC 

B28 

RESERVED

 

A29 

NC 

B29 

RESERVED 

A30 

NC 

B30 

RESERVED 

A31 

NC 

B31 

RESERVED 

A32 

GND 

B32 

GND 

A33 

NC 

B33 

RESERVED 

A34 

NC 

B34 

RESERVED 

A35 

RESERVED 

B35 

RESERVED 

A36 

NC 

B36 

RESERVED 

A37 

NC 

B37 

RESERVED 

A38 

GND 

B38 

RESERVED 

A39 

SMBUS_P2_CLK 

B39 

SMBUS_THRM_CLK 

A40 

SMBUS_P2_DAT 

B40 

SMBUS_THRM_DAT 

A41 

PCIE_CLKREQ# 

B41 

GND 

A42 

FCH_GPIO57 

B42 

RESERVED

 

A43 

FCH_GPIO58 

B43 

RESERVED

 

A44 

GND 

B44 

FCH_PWM0_GPIO197

 

A45 

USB_P13_P 

B45 

RESERVED

 

A46 

USB_P13_N 

B46 

RESERVED

 

A47 

USB_P5_P13_OVC 

B47 

FCH_PWM1_GPIO198

 

A48 

USB_P5_P 

B48 

VCC_12V 

A49 

USB_P5_N 

B49 

VCC_12V 

A50 

GND 

B50 

VCC_12V 

Table 14      PX1, PX2 connector data 

Manufacturer 

Mfg. P/N 

Mating connector  

FCI 

61082-10260[2|6]LF 

61083-10460[2|6]LF 

Содержание Face

Страница 1: ...FACE MODULE Design Guide...

Страница 2: ...reason of negligence will be accepted by CompuLab its subsidiaries or employees for any direct or indirect loss or damage caused by omissions from or inaccuracies in this document CompuLab reserves th...

Страница 3: ...SMBus 9 3 5 Digital Audio 9 3 6 LPC 9 3 7 GPIOs 10 3 8 Power 10 3 9 Miscellaneous 11 4 FACE MODULE CONNECTORS 12 4 1 FACE Extension Connectors PX1 PX2 12 5 ELECTRICAL DESIGN RECOMMENDATIONS 14 5 1 Gen...

Страница 4: ...Revised February 2012 FACE Module Design Guide 4 Table 1 Document Revision Notes Date Description January 2011 First release...

Страница 5: ...e documentation necessary to design and program custom FACE modules for CompuLab products 1 2 Related Documents For additional information not covered in this document please refer to the documents li...

Страница 6: ...ction And Connectivity Extension modules FACE modules are implemented by an internal extension board and a simple sheet metal panel The extension board is connected to the PC motherboard with two boar...

Страница 7: ...t 1 receive negative PCIe 2 PCIE_P2_TX_P PX1 A38 I O PCIe port 2 transmit positive PCIE_P2_TX_N PX1 A39 I O PCIe port 2 transmit negative PCIE_P2_RX_P PX1 B38 I O PCIe port 2 receive positive PCIE_P2_...

Страница 8: ...e SATA_P3_RX_N PX1 A12 I SATA channel 3 receive negative SATA generic SATA_ACT PX1 B4 OD SATA channel active 3 3 USB Table 5 PCIe Interface Signals Signal Name Pin Type Description Notes USB 4 USB_P4_...

Страница 9: ...Table 7 Digital Audio Interface Signals Signal Name Pin Type Description Notes HDA_ RST PX1 A16 O HD audio interface reset HDA_SYNC PX1 A17 O HD audio sync signal to codec HDA_CLK PX1 A18 O HD audio i...

Страница 10: ...IO205 PX2 A24 FCH_GPIO129_OD PX2 A17 I OD General Purpose I OD FCH_GPIO130_OD PX2 A18 FCH_GPIO144_OD PX2 A14 FCH_GPIO145_OD PX2 A4 FCH_GPIO146_OD PX2 A10 FCH_GPIO147_OD PX2 A15 FCH_GPIO149_OD PX2 A16...

Страница 11: ...in the S1 state This signal has an internal pull up resistor SLEEP_S3 PX1 B43 O S3 sleep power plane control Assertion of SLP_S3 shuts off power to non critical components when system transitions to...

Страница 12: ...7_N A19 HDA_SOUT B19 5V_S5 A20 HDA_SIN1 B20 RESERVED A21 HDA_SIN2 B21 IR TX A22 FCH_GPIO182 B22 LPC_IRQ A23 GND B23 LPC_CLK A24 USB_P4_P B24 LPC_LFRAME A25 USB_P4_N B25 GND A26 USB_P4_P12_OVC B26 RESE...

Страница 13: ...CH_GPIO10 A22 FCH_GPIO150_OD B22 NC A23 FCH_GPIO204 B23 FCH_GPIO11 A24 FCH_GPIO205 B24 FCH_GPIO12 A25 GND B25 GND A26 NC B26 PCIE_CLK2_P A27 NC B27 PCIE_CLK2_N A28 NC B28 RESERVED A29 NC B29 RESERVED...

Страница 14: ...le use a high frequency stitching capacitor Refer to the reference schematic designs available in the FACE module design package 5 2 PCIe Design Guidelines One AC coupling series capacitor of 100nF is...

Страница 15: ...directly across the device power and GND pins no further than 50 mils away Provide the option for a common mode choke for EMI suppression for any USB pairs that can be connected to cabled devices The...

Страница 16: ...NICAL DESIGN CONSIDERATIONS 6 1 FACE Module PCB design The mechanical drawings below specify component placement restrictions Full mechanical drawings are available as part of the FACE module design p...

Страница 17: ...l Design Can be made of sheet metal 1 3mm to 1 4mm Connector holes can be manufactured by laser cutting milling or punching Full mechanical drawings are available as part of the FACE module design pac...

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