4
Block Diagram (FSK/MSK/GFSK Digital Demodulator)
Bias
Removal
Real or
Complex
Input
Samples
Sample
CLK
Bit Timing
Loop
ADC
Sampling
Rate NCO
Symbol
Decoding
Demodulated
Data Bits
Magnitude
Half-Band
LPF x2
Burst
AGC
Rx Gain
Control
Variable
Decimation
CIC Filter
Frame/
Superframe
Detection
ADC
sampling
clock
error
8*N samples
per symbol (typ.)
1 sample
per symbol
Start of
Frame/
Superframe
Block Diagram (FSK/MSK/GFSK Digital Modulator)
1/2
n
Elastic
buffer
1/2/4/8*
16Kbit
Symbol
rate
Sample CLK
8-bit parallel
data
PRBS-11
test
sequence
Frame
formatting
(sync word,
preamble)
Flow control
Frequency
reference
PLL
processing clock
symbol clock
M-ary
mapping
(2,4,8)
modulation
order (2-FSK,
4-FSK, etc)
Gaussian
Filter
BT = 0.3
or 0.5
bypass
X
modulation
index h
+
Output
center
frequency
NCO
X
X
Gain
I
Q
Electrical Interface
Other
Digital
Modem
Interfaces
Definition
USB 2.0
Type B receptacle. This interface
supports two virtual channels: one for
monitoring and control, the other to
convey information data between the
modem and a host computer.
LAN / TCP-
IP
Networking requires an additional
10/100/1000 Mbps Ethernet adapter
(COM-5102 or COM-5401) plugged in
the left (J6) connector. The COM-1503
includes a TCP-IP server, awaiting a
remote client connection at port 1024.
Power
Interface
4.75 – 5.5VDC. Terminal block. Power
consumption is approximately proportional
to the symbol clock rate (f
symbol_clk
). The