BAT32G1x9 user manual | Chapter 8 Timer B
260 / 1149
Rev.1.02
7
6
5
4
3
2
1
0
TBDFB
TBDFA
TBMDF
TBPINM
8.3.2 Timer B mode register (TBMR).
Figure 8-3
Format of the timer B mode register (TBMR).
Address: 40042650H
After reset:
00H R/W
symbol
TBMR
TBSTART
The beginning of the TB count
0
Stop counting, and initialize the PWM
output signal (TBIO0
pin) (PWM
mode).
1
Start counting.
TBELCICE
EVENTC enters the selection
notes
1
and
2
for the capture request
0
Select an external input signal 1/digital filter through signal 1.
1
Select event for EVENTC input (Input Capture).
TBDFCK1
TBDFCK0
Select
note
1
for the clock used in the digital filter function
0
0
f
CLK
/32
0
1
f
CLK
/8
1
0
f
CLK
1
1
TBCR register of
TBTCK0~TBTCK2
bit select clock
TBDFB
TBIO1
pin digital filter function selection
0
There is no digital filter function.
1
There is a digital filter function.
When the digital filter function is available, up to 5
sampling clock cycles of the digital filter are required for
edge detection.
TBDFA
TBIO0
pin digital filter function selection
0
There is no digital filter function.
1
There is a digital filter function.
When the digital filter function is available, up to 5
sampling clock cycles of the digital filter are required for
edge detection.
TBMDF
Selection of phase count mode
0
Increment the count
1
Phase count mode
When the TBMDF bit is "0", the counter counts the counting source set by the TBTCK0~TBTCK2 bit of the
TBCR register; When the TBMDF bit is "1", the counter pair is shown in "Table 8-15TB Registers Plus and
Subtract Conditions" The phase of the input signal at the TBCLKj pin (j=0, 1) is counted.
TBPWM
Choice of
PWM mode
0
Timer mode
1
PWM mode
Note 1
This bit cannot be
set when the
TBSTART
bit is
"0"
(stop count).
2. For event (input capture
)
of the EVENTC input to
be valid, the
TBIO12
position
of
the
TBIOR
register must be
"1"
,
and the TBIO11
bit must
be combined TBIO10
position
"00B"
(rising edge).