
Evaluation Kit for CMX7x6x
PE0601-xxxx
©
2011 CML Microsystems Plc
11
UM0601/2
CONNECTOR PINOUT
Connector
Ref.
Connector
Pin No.
Signal
Name
Signal
Type
Description
J10 6 SCLK
I/P
Serial clock input. Connects to host
μ
C.
7
RF_SCLK
I/P
RF Serial Clock.
8
RDATA
O/P
Serial data output. Connects to host
μ
C.
10 IRQN
O/P
Interrupt request. Connects to host
μ
C.
11, 12
GNDD
PWR
Digital ground.
13
BOOTEN1
I/P
CMX7x6x hardware boot control.
14
BOOTEN2
I/P
CMX7x6x hardware boot control.
9, 15 to 20
N/C
-
J11 1 SSOUT2
BI
C-BUS
master,
spare chip select, FI dependent.
2
SSOUT1
BI
C-BUS master, chip select, FI dependent.
3
GPIO6
BI
CMX7x6x signal, FI dependent.
4
SDO
BI
C-BUS master, command data, FI dependent.
5
GPIO7
BI
CMX7x6x signal, FI dependent.
6
CLK
BI
C-BUS master, serial clock, FI dependent.
7
GPIO8
BI
CMX7x6x signal, FI dependent.
8
SDI
BI
C-BUS master, reply data, FI dependent.
9
GPIO9
BI
CMX7x6x signal, FI dependent.
10
GPIO11
BI
CMX7x6x signal, FI dependent.
11, 12
GNDD
PWR
Digital ground.
13
GPIO3
BI
CMX7x6x signal, FI dependent.
14
GPIO4
BI
CMX7x6x signal, FI dependent.
15
17
GPIO10
SSOUT0
BI
BI
CMX7x6x signal, FI dependent.
C-BUS master, spare chip select, FI dependent.
16, 18, 19,
20
N/C -
J13
1
AUXADC3
I/P
Auxiliary ADC input.
2
AUXDAC0
O/P
Auxiliary DAC output.
3
AUXADC2
I/P
Auxiliary ADC input.
4
AUXDAC1
O/P
Auxiliary DAC output.
5
AUXADC1
I/P
Auxiliary ADC input.
6
AUXDAC2
O/P
Auxiliary DAC output.