Schematic Diagrams
IDT CLOCK B - 9
B.Schematic Diagrams
IDT CLOCK
FSLB
167MHz
200MHz
0
1
1
1
1
0
CLK_DOT96 3
CLK_DOT96# 3
PM_STPPCI#
C LK_ICH
FSLC
Zo = 95 Ohm
¡Ó17.5%
SRC Clock - 100MHz
Zo = 95 Ohm
¡Ó17.5%
PCLK_ICH
9
C LK_ICH48
9
C LK_ICH14
11
CLK_CPU_HPL# 2
CLK_DREFSS# 3
CLK_DREFSS 3
CLK_DDR3REF_CLK 4
CLK_DDR3REF_CLK# 4
CLK_CPU_HPL 2
CLK_ICH_DMI# 9
CLK_SATA 10
CLK_SATA# 10
CLK_PCIE_WLAN# 19
CLK_CPU_DMI# 3
CLK_CPU_DMI 3
CLK_PCIE_JMC 261# 17
CLK_PCIE_WLAN 19
CLK_PCIE_JMC 261 17
CLK_ICH_DMI 9
KBC_PCLK
18
PCLK_TPM
15
C LKICH 48
R265
10K_04
C3
5
1
0.
1
u_1
6V
_
Y
5V
_0
4
C
344
0.
1u
_1
6
V
_Y
5
V
_0
4
FSLC
C
353
*
1
0u
_6.
3
V
_X
5
R
_
0
6
FSLB
C3
4
7
*0.
1
u_
16V
_
Y
5V
_
0
4
C3
5
4
1
u_1
0V
_Y
5
V
_0
6
R 272
* 10K_04
R270
33_04
L46
*H CB1608KF-121T25_short
C3
3
8
*1
0
u
_
6
.3
V_
X5
R
_
0
6
R266
10K_04
L47
* HCB1608KF-121T25_short
R274
33_04
SMBUS
Zo = 50 Ohm
¡Ó15%
PCI - 33MHz
Zo = 50 Ohm
¡Ó15%
R273
33_04
R263
10K_04
C 345
27p_50V_NPO_04
R275
10K_04
10 m ils
X6
FSX8L_14.31818MHz
1
2
14MHz
Zo = 50 Ohm
¡Ó15%
PLACE CRYSTAL WITHIN
500 M ILS OF CK505
C3
5
0
0
.1u
_16
V
_
Y
5
V
_04
C
348
0.
1u
_1
6
V
_Y
5
V
_0
4
DOT Clock - 96MHz
Zo = 95 Ohm
¡Ó17.5%
USB - 33MHz
Zo = 50 Ohm
¡Ó15%
R267
10K_04
C342
27p_50V_NPO_04
R262
* 0_04
R271
10K_04
C3
4
6
0
.1u
_16
V
_
Y
5
V
_04
R276
33_04
R264
*10K_04
R268
33_04
R 269
10K_04
C3
5
2
*0.
1
u
_16
V
_
Y
5
V
_04
ALL_SY S_PWRGD
11,18
PM_STPPCI#
11
PM_STPCPU#
11
1.5VS
3,5,9,12,23
3.3VS
3,6,7,9,10,11,12,13,14,15,16,17,18,21,23
1.05VS
2,5,10,11,12,24,26
CLK_ICH
PMSTPC PU#
CLKREQB#
CLKREQA#
PM_STPPCI#
Freque ncy
Host Clock
FSLC
100MHz
0
0
133MHz
U16
IDT 9VR S4338
X2
1
X1
2
VD
D
R
EF
3
REF0_2X/FSLC
4
SDATA
5
SCLK
6
V
DDP
C
I_
3
.3
7
ITP_EN/PCICLK_F0_2X
8
FSLB/PCILK1_2X
9
CLKR EQA#/PC ICLK2_2X
10
G
NDP
CI
11
GN
D
2
5
12
v SEL_PCI/25M_PCICLK3_2x
13
VD
D
2
5
14
VD
D
4
8
15
v SATA_SEL/USB_48Mhz_2x
16
GN
D
4
8
17
CLKR EQB#
18
DOT96_LRS/SRC4_LRS
19
DOT96#_LRS/SRC 4#_LRS
20
VD
D
_
C
O
R
E
_
1
.5
21
LC D100_LRS
22
LCD100#_LRS
23
G
NDL
C
D
24
G
N
D
SAT
A
25
SATA#_LRS
26
SATA_LRS
27
SRC 3#_LRS
28
SRC3_LRS
29
VD
D
S
R
C
_
L
VI
O
30
PCI_STOP#_3.3
31
SRC 2#_LRS
32
SRC2_LRS
33
GN
D
S
R
C
34
SRC 1#_LRS
35
SRC1_LRS
36
CPU_STOP#_3.3
37
CPU_ITP#/SRC 0#_LRS
38
CPU _ITP/SRC0_LRS
39
V
D
D_
C
O
RE
_
1
.5
40
VD
D
C
P
U
_
L
VI
O
41
CPU 1#_LRS
42
CPU1_LRS
43
GN
D
C
P
U
44
CPU 0#_LRS
45
CPU0_LRS
46
CLKPWR GD/PD#_3.3
47
G
NDR
E
F
48
T
H
E
R
M
A
L
PAD
49
C3
4
3
0
.1u_
16
V
_
Y
5
V
_
04
XTAL_OUT
XTAL_IN
C
349
0.
1u
_1
6V
_Y
5
V
_0
4
SMBCLK0
6,7,11
SMBDAT0
6,7,11
C
339
*
1
u_
10V
_
Y
5V
_
0
6
3.3VS
3.3VS_C LK
3.3VS
3.3VS
1.5VS_C LK
1.5VS
1.05VS_CLK
1.05VS
3.3VS
C LKREQA#
L45
*HC B1608KF-121T25_short
XTAL_OUT
XTAL_IN
PMSTPCPU #
C LKREQB#
FSLB
Sheet 8 of 31
IDT CLOCK
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