Schematic Diagrams
B - 6 Processor 4/7
B.Schematic Diagrams
Processor 4/7
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
FLOAT FOR SKL
GND FOR CNL
NEAR CPU
CAD Note: Capacitor need to be placed
close to buffer output pin
CFG7
DEFENSIVE PULL DOWN SITE
1: (Default) PEG Train immediately following xxRESETB de assertion
0: PEG Wait for BIOS for training
CFG4
1: DISABLED;
NO PHYSICAL DISPLAY PORT ATTACHED
TO EMBEDDED DISPLAY PORT
0: ENABLED;
AN EXTERNAL DISPLAY PORT DEVICE
IS CONNECTED TO THE EMBEDDED
DISPLAY PORT
DISPLAY PORT PRESENCE STRAP
CFG2
1: (DEFAULT)NORMAL OPERATION;
LANE# DEFINITION MATCHES
SOCKET PIN MAP DEFINITION
0: LANE REVERSAL
PCI EXPRESS STATIC LANE REVERSAL FOR ALL PEG PORTS
CFG[6:5]
11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
PCIE PORT BIFURCATION STRAPS
TO EC
VCCST_PWRGD
CFG[0]: Stall reset sequence after PCU
Ʉ
PLL lock until de-asserted:
— 1 = (Default) Normal Operation;
No stall.
— 0 = Stall.
CFG[1]: Reserved configuration lane.
Ʉ
CFG[2]: PCI Express* Static x16 Lane
Ʉ
Numbering Reversal.
— 1 = Normal operation
— 0 = Lane numbers reversed.
CFG[3]: Reserved configuration lane.
Ʉ
CFG[4]: eDP enable:
Ʉ
— 1 = Disabled.
— 0 = Enabled.
CFG[6:5]: PCI Express* Bifurcation
Ʉ
— 00 = 1 x8, 2 x4 PCI Express*
— 01 = reserved
— 10 = 2 x8 PCI Express*
— 11 = 1 x16 PCI Express*
CFG[7]: PEG Training:
Ʉ
— 1 = (default) PEG Train
immediately following RESET# de
assertion.
— 0 = PEG Wait for BIOS for
training.
CFG[19:8]: Reserved configuration
Ʉ
lanes.
D01A
D01A
D01A
D01A
Del test point
D01A
Del test point
D01A
Del test point
H_PROCHOT#_R
H_PROCHOT#
H_PM_DOW N_R
H_SKTOCC_N
CFG_RCOMP
CPU_VIDALERT_N
SKL_XDP_MBP_0
SKL_XDP_MBP_1
SKL_MBP_2
SKL_MBP_3
H_TDO
H_TCK
H_TRST#
H_PREQ#
H_PRDY#
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG11
CFG12
CFG13
CFG14
CFG15
CFG10
CFG0
VCCST_PW RGD_CPU
CFG9
H_PROCHOT#
H_TDO
H_TCK
H_PECI_R
VCCST_PW RGD
VCCST_PW RGD
H_SKTOCC_N
1.0V_VCCST
VCCIO
1.0DX_VCCSTG
1.0V_VCCST
3.3VA
1.0V_VCCST
VDD3
3.3VA
H_PROCHOT#
56,61,63
PCH_PECI
34
PCH_CPU_BCLK_R_DN
37
PCH_CPU_BCLK_R_DP
37
PCH_CPU_PCIBCLK_R_DN
37
PCH_CPU_PCIBCLK_R_DP
37
CPU_24MHZ_R_DN
37
CPU_24MHZ_R_DP
37
H_PW RGD
35
PLTRST_CPU_N
34
H_PM_SYNC
34
H_PM_DOW N
34
PCH_THERMTRIP#
34
H_SKTOCC_N
36
H_CPU_SVIDCLK
61,63
H_CPU_SVIDDAT
61,63
H_CPU_SVIDALRT#
61,63
H_TRST#
40
H_PREQ#
40
H_PRDY#
40
H_PROCHOT_EC
48
H_PECI
48
ALL_SYS_PW RGD
13,40,48,61,63
DDR_VTT_PG_CTRL
52
1.0DX_VCCSTG
7,56,57
VDD3
30,32,35,38,40,44,48,50,51,53,54,55,56,57,58
VCCIO
2,3,7,55
1.0V_VCCST
7,34,35,55,61,63
3.3VA
32,33,34,35,36,38,40,54
Title
Size
Document Number
Rev
Date:
Sheet
of
6-71-P65R0-D03
D03
[05]Processor 4/7-CLK/JTAG/MISC
A3
5
79
Friday, July 03, 2015
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
P650RE
Title
Size
Document Number
Rev
Date:
Sheet
of
6-71-P65R0-D03
D03
[05]Processor 4/7-CLK/JTAG/MISC
A3
5
79
Friday, July 03, 2015
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
P650RE
Title
Size
Document Number
Rev
Date:
Sheet
of
6-71-P65R0-D03
D03
[05]Processor 4/7-CLK/JTAG/MISC
A3
5
79
Friday, July 03, 2015
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
P650RE
R788
51_04
R767
*1K_04
R348
51_04
R326
*1K_04
R774
*1K_04
C353
*0.01u_16V_X7R_04
R325
*1K_04
R182
60.4_1%_04
R771
20_1%_04
R761
*1K_04
R322
100_04
R779
*0402_short
R159
*12.1_1%_04
R324
220_04
R786
49.9_1%_04
S
D
G
Q9A
MTDK5S6R
2
6
1
R759
*1K_04
R174
100K_04
SKYLAKE_HALO
BGA1440
5 OF 14
REV = 1
?
?
U113E
SKL_H_BGA_BGA
PROC_SELECT#
BN1
CATERR#
BM30
SKTOCC#
BR33
PM_DOWN
BP31
PM_SYNC
BM34
RESET#
BP35
PROCPWRGD
BT31
VCCST_PWRGD
H13
CFG[17]
BN23
CFG[15]
BT19
CFG[16]
BP23
CFG[11]
BT22
CFG[12]
BM19
CFG[10]
BT23
CFG[9]
BR22
CLK24N
D31
CFG[1]
BN27
CFG[3]
BN28
CFG[18]
BN22
PROC_TDI
BL32
CFG[0]
BN25
CFG[2]
BN26
CFG[4]
BR20
CFG[6]
BT20
CFG[5]
BM20
CFG[7]
BP20
CFG[8]
BR23
CFG[13]
BR19
CFG[14]
BP19
CFG[19]
BP22
PROC_PREQ#
BL30
PROC_PRDY#
BP27
VIDSCK
BH32
PROC_TDO
BT28
CLK24P
E31
PCI_BCLKN
C36
PCI_BCLKP
D35
BCLKN
A32
VIDSOUT
BH29
PROCHOT#
BR30
DDR_VTT_CNTL
BT13
CFG_RCOMP
BT25
PROC_TRST#
BP30
PROC_TCK
BR28
PROC_TMS
BP28
VIDALERT#
BH31
THERMTRIP#
J31
PECI
BT34
BCLKP
B31
BPM#[0]
BR27
BPM#[1]
BT27
BPM#[2]
BM31
BPM#[3]
BT30
R782
*1K_04
R768
*1K_04
R766
*1K_04
R770
499_1%_04
R783
*1K_04
R327
*1K_04
R188
1K_04
R776
*1K_04
R784
1K_04
R765
*1K_04
R362
1K_04
R762
*0402_short
R323
*1K_04
R772
100K_04
R330
56.2_1%_04
R780
*10K_04
R1859
0_04
R758
*0_04
R368
100K_04
S
D
G
Q9B
MTDK5S6R
5
3
4
Q27
2SK3018S3
G
D
S
R781
*1K_04
R775
*1K_04
C1735
*0.1u_10V_X7R_04
C590
47P_50V_NPO_04
Sheet 5 of 79
Processor 4/7
Содержание P650RA
Страница 1: ...P650RA P651RA ...
Страница 2: ......
Страница 3: ...Preface I Preface Notebook Computer P650RA P651RA Service Manual ...
Страница 24: ...Introduction 1 12 1 Introduction ...
Страница 45: ...Top A 3 A Part Lists Top 㚧ẋ㕁 Figure A 1 Top ...
Страница 46: ...A 4 Bottom A Part Lists Bottom Figure A 2 Bottom ...
Страница 47: ...Main Board A 5 A Part Lists Main Board Figure A 3 Main Board ...
Страница 48: ...A 6 HDD A Part Lists HDD Figure A 4 HDD ...
Страница 49: ...LCD A 7 A Part Lists LCD 暨天 Ĵňİōŕņġ㧉䳬 ġ 怠㬌ĴňIJİōŕņĮIJ 䶂ġġ 枰 怠ĴňIJİōŕņĮIJİ 䶂 ㇵ ẍ怠ġōŕņġĮij 䶂ġ Figure A 5 LCD ...
Страница 50: ...A 8 A Part Lists LCD Sharp 暨天 Ĵňİōŕņġ㧉䳬 ġ 怠㬌ĴňIJİōŕņĮIJ 䶂ġġ 枰 怠ĴňIJİōŕņĮIJİ 䶂 ㇵ ẍ怠ġōŕņġĮij 䶂ġ Figure A 6 LCD Sharp ...