NAX963HD
- 13 -
051-7540-90
SN74LVC2G32DCTR
Dual 2-input OR Gate
051-9125-60
BS616LV4013EI-70
4 M bit SRAM
Terminal Description
pin
1: A 4
: IN : Address signal input.
pin
2: A 3
: IN : Address signal input.
pin
3: A 2
: IN : Address signal input.
pin
4: A 1
: IN : Address signal input.
pin
5: A 0
: IN : Address signal input.
pin
6: CE_
: IN : Chip enable signal input.
pin
7: DQ 0
:I/O: The data input / output.
pin
8: DQ 1
:I/O: The data input / output.
pin
9: DQ 2
:I/O: The data input / output.
pin 10: DQ 3
:I/O: The data input / output.
pin 11: VCC
: - : Positive supply voltage.
pin 12: GND
: - : Ground.
pin 13: DQ 4
:I/O: The data input / output.
pin 14: DQ 5
:I/O: The data input / output.
pin 15: DQ 6
:I/O: The data input / output.
pin 16: DQ 7
:I/O: The data input / output.
pin 17: WE_
: IN : Write enable signal input.
pin 18: A 17
: IN : Address signal input.
pin 19: A 16
: IN : Address signal input.
pin 20: A 15
: IN : Address signal input.
pin 21: A 14
: IN : Address signal input.
pin 22: A 13
: IN : Address signal input.
pin 23: A 12
: IN : Address signal input.
pin 24: A 11
: IN : Address signal input.
pin 25: A 10
: IN : Address signal input.
pin 26: A 9
: IN : Address signal input.
pin 27: A 8
: IN : Address signal input.
pin 28: NU
: - : Not in use.
pin 29: DQ 8
:I/O: The data input / output.
pin 30: DQ 9
:I/O: The data input / output.
pin 31: DQ 10
:I/O: The data input / output.
pin 32: DQ 11
:I/O: The data input / output.
pin 33: VCC
: - : Positive supply voltage.
pin 34: GND
: - : Ground.
pin 35: DQ 12
:I/O: The data input / output.
pin 36: DQ 13
:I/O: The data input / output.
pin 37: DQ 14
:I/O: The data input / output.
pin 38: DQ 15
:I/O: The data input / output.
pin 39: LB_
: IN : Upper byte control signal input.
pin 40: UB_
: IN : Lower byte control signal input.
pin 41: OE_
: IN : Output enable signal input.
pin 42: A 7
: IN : Address signal input.
pin 43: A 6
: IN : Address signal input.
pin 44: A 5
: IN : Address signal input.
Truth Table
CE_
WE_
OE_
LB_
UB_
DQ 0
DQ 8
in
in
in
in
in
to
to
(pin 6)
(pin 17)
(pin 41)
(pin 39)
(pin 40)
DQ 7
DQ 15
H
X
X
X
X
high Z
high Z
L
H
H
X
X
high Z
high Z
L
H
L
L
L
output
output
L
H
L
H
L
high Z
output
L
H
L
L
H
output
high Z
L
L
X
L
L
input
input
L
L
X
H
L
X
input
L
L
X
L
H
input
X
051-9333-30
MT46V16M16P-6T-IT
256M bit DDR SDRAM (16M words x 16 bits)
Terminal Description
pin
1: VDD
: - : Positive voltage supply.
pin
2: DQ 0
:I/O: Data signal input/output.
pin
3: VDD Q
: - : Positive power supply for the data I/O
ports.
pin
4: DQ 1
:I/O: Data signal input/output.
pin
5: DQ 2
:I/O: Data signal input/output.
pin
6: VSS Q
: - : Ground terminal for the data I/O ports.
pin
7: DQ 3
:I/O: Data signal input/output.
pin
8: DQ 4
:I/O: Data signal input/output.
pin
9: VDD Q
: - : Positive power supply for the data I/O
ports.
pin 10: DQ 5
:I/O: Data signal input/output.
pin 11: DQ 6
:I/O: Data signal input/output.
pin 12: VSS Q
: - : Ground terminal for the data I/O ports.
pin 13: DQ 7
:I/O: Data signal input/output.
pin 14: NU
: - : Not in use.
pin 15: VDD Q
: - : Positive power supply for the data I/O
ports.
pin 16: Lower DQ S
:I/O: Read data strobe output / Write data
strobe input.
pin 17: NU
: - : Not in use.
pin 18: VDD
: - : Positive voltage supply.
pin 19: NU
: - : Not in use.
pin 20: Lower DM
: IN : When this pin is High, the data input are
masked.
pin 21: WE
: IN : Write enable signal input.
pin 22: CAS
: IN : Column address strobe input.
pin 23: RAS
: IN : Row address strobe input.
pin 24: CS IN
: IN : The chip select command input.
pin 25: NU
: - : Not in use.
pin 26: BA 0
: IN : Bank address input.
pin 27: BA 1
: IN : Bank address input.
pin 28: A10(AP)
: IN : Address signal input.
pin 29: A 0
: IN : Address signal input.
pin 30: A 1
: IN : Address signal input.
pin 31: A 2
: IN : Address signal input.
pin 32: A 3
: IN : Address signal input.
pin 33: VDD
: - : Positive voltage supply.
pin 34: VSS
: - : Negative voltage supply.
pin 35: A 4
: IN : Address signal input.
pin 36: A 5
: IN : Address signal input.
pin 37: A 6
: IN : Address signal input.
pin 38: A 7
: IN : Address signal input.
pin 39: A 8
: IN : Address signal input.
pin 40: A 9
: IN : Address signal input.
pin 41: A 11
: IN : Address signal input.
pin 42: A 12
: IN : Address signal input.
pin 43: NU
: - : Not in use.
pin 44: CKE
: IN : Clock enable signal input.
pin 45: CK
: IN : Master clock input.
pin 46: /CK
: IN : Master clock input.
pin 47: Upper DM
: IN : When this pin is High, the data input are
8
7
6
5
1
2
3
4
GROUND
VDD