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Appendix A: Watchdog Timer
The working algorithm of the WDT function can be simply described as a counting
process. The Time-Out Interval can be set through software programming. The
availability of time-out interval is set by software.
The System Board allows users control WDT through dynamic software programming.
The WDT starts counting when it is activated. It sends out a signal to system reset,
when time-out interval ends. To prevent the time-out interval from running out, a
re-trigger signal will need to be sent before the counting reaches its end. This action
will restart the counting process.
WDT program should keep the counting process running under normal condition.
WDT should never generate a system reset unless the system runs into troubles.
The related Control Registers of WDT are all included in the following sample
program that is written in C language. User can fill a non-zero value into the Time-out
Value Register to enable/refresh WDT. System will be reset after the Time-out Value
to be counted down to zero. Or user can directly fill a zero value into Time-out Value
Register to disable WDT immediately.
To ensure a successful accessing to the content of desired Control Register, the
sequence of following program codes should be step-by-step run again when each
register is accessed.
For more information about WDT, please refer to Fintek F81866A data sheet.
There are two PnP I/O port addresses that can be used to configure WDT,
1) 0x2E:EFIR (Extended Function Index Register, for identifying CR index number)
2) 0x2F:EFDR (Extended Function Data Register, for accessing desired CR)
Below are some example codes, which demonstrate the use of WDT.