17
MIN
MAX
UNIT
T1
80
ns
T2
80
ns
T3
80
ns
4.14 GENERAL PURPOSE I/O OUTPUT CIRCUIT
Besides the PAO ports and PCI ports mentioned above, there are some other ports available.
PORT NAME
I/O
INCIDENTAL CONDITIONS
ADDRESS
PAO
Output ASTB pin at "Low".
XX02h
PCO
Output Bit 7 held at PBUSY. Others are unused.
XX04h
PAI
Input
None
XX02h
PBI
Input
None
XX03h
PCI
Input
STB pin at "Low".
XX04h
4.15 BIT DATA PROCESSING METHOD
This gate array is equipped with a data processing circuit which faciliates processing of bit data when print data are
developed in memory.
a.) 180° turning circuit (MSB/ LSB switching)
b.) Double character conversion circuit (8 bit
→
16 bits conversion)
c.) 90° turning circuit (8 bits x 8 bits turned by 90°.)
The 180° turning circuit and the double character conversion circuit perform data processing in 1 byte unit, while the
90° turning circuit performs it in 8 bytes unit. The methods are shown as follows:
a) 180° Turning Circuit
1. Write, into the XX05h processing bit data buffer, the bit data for which turning is to be performed.
2. With data being read out from output of 180° turned XX05h address, data which have been turned by 180° are
obtained. (Address being the same.)
D7
D6
D5
D4
D3
D2
D1
D0
Data prior to turning
p
D0
D1
D2
D3
D4
D5
D6
D7
Data after turning
b) Double Character Conversion Circuit
1. Write the bit data to be doubled into the bit data buffer for processing of Address XX05h.
2. With data being read out from the lateral double lower 8-bit output and the lateral double upper 8-bit output of
Addresses XX06h and XX07h, data having been processed in 16 bits are obtained.
D7
D6
D5
D4
D3
D2
D1
D0
p
D7
D7
D6
D6
D5
D5
D4
D4
D3
D3
D2
D2
D1
D1
D0
D0
XX07h(upper)
XX06h (lower)
Содержание CBM-202LA s
Страница 20: ...20 5 OPERATION TIMING Operation timings immediately following initialization are shown below ...
Страница 23: ...23 7 REFERENTIAL CIRCUIT DIAGRAM ...
Страница 24: ...24 ...