VCC-F52U25CL
Rev.900-668-31-01
©2010 CIS Corporation. All rights reserved.
13
LVAL Output
296 CLK
Video Output
DVAL Output
FVAL Output
1920 CLK
1624 CLK
CLK 72 MHz
1 CLK
296 CLK
7.
Timing Chart
7.1.
Horizontal Synchronous Signals Timing
7.2.
Vertical Synchronous Signals Timing
LVAL Output
Video Output
DVAL Output
FVAL Output
1
2
3
4
5
6
7
8
9 10 11 12
28
30 31
(CCD Read Out Signal)
9H(V Sync)
28H
19H(Back proch)
Total = 1252H
125
2
125
1
29
32 33 34 35 36 37 38 39 40
125
2
125
1
1
2
3
1200H
(Active Line)
24H
(Active Line Margin)
12
28
122
9
122
6
122
7
122
5
122
4
122
2
122
3
122
1
122
0
121
9
