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3-1

©

Copyright 2008 Cirrus Logic , Inc.

DS784DB1

CDB485x00-USB Evaluation Kit Guide

Chapter 3

CDB48500 System Description

A detailed block diagram of the CDB48500 Customer Development Board is shown in 

Figure 3-1

. The 

sections that follow provide a detailed description of each block.

 Figure 3-1. CDB48500 Block Diagram

CS42448_RESET

Cont

rol H

eader

 – J1

1

CS42448

CS485XX

CS8416

MIC In

MIC 

Preamp

S/PDIF 

In

S/PDIF

Out

USB Clocks/Data

SPI FLASH

LED

WDO

DSP_RESET

BRD_RESET

1

0

ADC Data

S/PDIF Data

Audio Clocks

SPDIF IN

SPDIF OUT

SPI / I2C

XT

AL

_

O

UT

Analog

In

Analog

In

Analog

In

Analog

In

Analog

In

Up to 12

Analog

Inputs

Analog

In

Analog

In

Analog

In

Analog

In

Analog

In

Up to 12

Analog

Outputs

2x

CS42448

I2C FLASH

Headphone

Out

DAO Audio Out

DAO Audio Out

DAO[3]

Содержание CDB48500-USB

Страница 1: ... Copyright 2008 Cirrus Logic Inc MAY 2008 DS784DB1 High performance 32 bit Audio Decoder DSP Family http www cirrus com CDB48500 USB Evaluation Kit Guide ...

Страница 2: ...TS FROM ANY AND ALL LIABILITY INCLUDING ATTORNEYS FEES AND COSTS THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES Cirrus Logic Cirrus the Cirrus Logic logo designs and DSP Composer are trademarks of Cirrus Logic Inc All other brand and product names in this doc ument may be trademarks or service marks of their respective owners DTS is a registered trademark of the Digital Theater System...

Страница 3: ...up and Installing the Evaluation Kit Software 2 1 2 1 Introduction 2 1 2 1 1 Installing the Evaluation Kit Software 2 1 2 1 2 Setting up the Evaluation Kit Boards 2 3 2 1 3 Connecting to a PC 2 4 2 1 4 Running a Stereo PCM Application on CDB48500 USB 2 6 2 1 5 Downloading Other Applications 2 6 Chapter 3 CDB48500 System Description 3 1 3 1 CDB48500 System Block Descriptions 3 2 3 1 1 Audio Inputs ...

Страница 4: ...ntrol Protocol I2 C or SPI 4 7 4 2 5 Headphone Output 4 8 4 2 6 S PDIF Transmitter 4 9 Appendix A Schematics A 1 A 1 Introduction A 1 A 1 1 Schematic Pages A 1 A 1 1 1 Detailed Schematic Descriptions A 1 A 1 1 1 1 CS48500 System Block Diagram A 1 A 1 1 1 2 DSP Input Data Multiplexing A 1 A 1 1 1 3 Coyote DSP Core A 1 A 1 1 1 4 Serial Flash Memory A 2 A 1 1 1 5 S PDIF Receiver A 2 A 1 1 1 6 Codec 1...

Страница 5: ...re 3 4 CDB USB Master Card Clocking and Data Flow 3 8 Figure 4 1 PCM Pass through Example Application 4 2 Figure 4 2 System Configuration 4 2 Figure 4 3 Audio In via S PDIF In 4 3 Figure 4 4 Audio In via 8 Channel ADC 4 4 Figure 4 5 DAI Device Properties 4 5 Figure 4 6 CDB48500 Digital Audio Output Properties 4 6 Figure 4 7 Codec DAC Properties 4 7 Figure 4 8 CDB48500 Comm Mode 4 8 Figure 4 9 Rema...

Страница 6: ...vi Copyright 2008 Cirrus Logic Inc DS784DB1 CDB48500 USB Evaluation Kit Guide ...

Страница 7: ...ative 1 1 4 Support Hardware Requirements Digital or Analog Audio Source e g DVD player PC with a digital audio card device Amplified Speakers for audio playback e g powered PC speakers AVR amp speakers 1 1 5 Cabling Requirements Digital Audio Inputs S PDIF Optical or Coaxial RCA Cables Connect to digital audio card audio analyzer or DVD player Digital Audio Output S PDIF Optical Cable Connect to ...

Страница 8: ...er graphical user interface Serial control of audio devices on CDB48500 via I2 C or SPI protocols Digital audio input of PCM via optical or coaxial S PDIF does not support compressed data input Up to 12 channel analog audio input via the two CS42448 audio codecs Up to 12 channel analog output through the two CS42448 audio codecs Digital audio output of PCM data via optical S PDIF Headphone output ...

Страница 9: ...Jacks PCM only J2 I Coaxial S PDIF Input Jacks PCM only J31 J Analog Inputs 2 Vrms Max K USB Connector on CDB USB Master P1 L Alternate 12V Jumper J3 M 3 3V Switching Regulator 1 5A U8 N 3 3V Selection Header Regulator External J17 O 1 8V Selection Header Regulator External J18 P 1 8V Linear Regulator 1A U14 Q 5V Selection Header Regulator External J19 R 5V Linear Regulator 1A U7 S Analog Audio Ou...

Страница 10: ...K CS485xx Family Data Sheet CS485xx Hardware Users Manual CS485xx Errata 1 2 2 3 CS485xx Family DSP Software Information The following document is installed with the CS485xx SDK AN298 CS485xx Firmware User s Manual 1 2 2 4 DSP Software Utility Information The following document is installed with the CS485xx SDK DSP Composer User s Manual The documents listed above are updated periodically and may ...

Страница 11: ...the CDB USB MASTER 1 Run the latest DSP evaluation software installation executable CS4853x_EVAL_V02_03_07 exe or later This executable is supplied by your Cirrus Logic representative 2 At the Welcome screen click Next 3 At the Licensing Agreement window select the I accept the agreement radio button to agree to the terms and then select Next 4 Select the Destination Location window Select the def...

Страница 12: ...he user to choose components for installation By default only one component is available and is pre selected Unified USB Driver Click Next to continue 10 The wizard will then ask the user to choose the install location Select the default location of C Program Files Opal Kelly FrontPanel and click Install This should take only a few seconds 11 Click Finish once the wizard has completed installation...

Страница 13: ... cable to the optical output on the back of a DVD player or other digital audio source 5 Setup Audio Output connections from CDB48500 as follows A The RCA connectors labeled AOUT_1A and AOUT_1B are the left and right analog output channels SPDIF_RXP CS48560 U S B AIN_6B USB Cable Power Cable RCA Cables To Powered Speakers Optical Cable Analog Inputs SPDIF_RXIN Optical Output Optical Output on DVD ...

Страница 14: ...0 port on a notebook or PC running Win XP 3 Windows should recognize that a new device has been attached and display a notice saying Found New Hardware Figure 2 3 Found New Hardware Service Window 4 Windows will display the Found New Hardware Wizard below Select the No not at this time radio button so that Windows does not connect to Windows Update for the drivers Click Next Figure 2 4 Found New H...

Страница 15: ...ure 2 5 Found New Hardware Wizard Finish Window 6 It is possible that during the installation Windows might issue a warning that the drivers have not passed Windows Logo testing Select Continue Anyway Figure 2 6 Windows 7 Windows should now locate the correct drivers and complete the installation ...

Страница 16: ...e sure that the DVD Player or other digital audio source is configured to output PCM data 5 Press Play on the DVD player or other digital audio source You should now hear audio from the speakers 2 1 5 Downloading Other Applications Separate project files cpa are provided for other applications such as Dolby Pro Logic II DTS Neo6 Audistry by Dolby SRS Circle Surround etc In order to evaluate these ...

Страница 17: ...ock Figure 3 1 CDB48500 Block Diagram CS42448_RESET Control Header J11 CS42448 CS485XX CS8416 MIC In MIC Preamp S PDIF In S PDIF Out USB Clocks Data SPI FLASH LED WDO DSP_RESET BRD_RESET 1 0 ADC Data S PDIF Data Audio Clocks SPDIF IN SPDIF OUT SPI I2C XTAL_OUT Analog In Analog In Analog In Analog In Analog In Up to 12 Analog Inputs Analog In Analog In Analog In Analog In Analog In Up to 12 Analog ...

Страница 18: ...F_RXP 3 1 1 3 Digital Coaxial Input Note Digital Coaxial Input is PCM only as there is no multi channel decoder present on CDB48500 USB Connector Type RCA Female Maximum Signal Level 3 3V Minimum Signal Level GND 0 7V Reference Designator J31 or SPDIF_RXN 3 1 1 4 Microphone Input Absolute Maximum Signal Level 5V Absolute Minimum Signal Level GND 0 7V Full Scale Amplitude 7mVp p Reference Designato...

Страница 19: ...rd Voltage Selection Headers Connector Type 1x3 0 100 inch Stake Header Reference Designator J17 J19 The CDB48500 USB is designed to operate from a single DC power input The 9V power supply provided with the kit is connected to the DC power input jack J25 and is regulated down to the system voltages 5V 3 3V 1 8V The power selection headers should be set to the REG position when using the DC wall s...

Страница 20: ...both the on board devices and J102 J103 headers 3 1 7 Cirrus Logic CS485xx Audio DSP The CS485xx audio DSP U6 are a family of 32 bit fixed point processors designed specifically for audio applications The CDB48500 allows a designer to evaluate the CS485xx DSPs in many different modes of multi channel input and output The 48 pin footprint on this board is compatible with any CS485XX chip Audio inpu...

Страница 21: ...th two 4 Mbit SPI flash devices and one I2 C EEPROM Selection from SPI to I2C is changed in Software There are 2 SPI flash footprints U11 U13 on the board for compatibility with both standard 8 pin serial flash pinouts The serial control lines are shared by both footprints and a chip select 0 ohm jumper resistor R101 is populated to make U13 the active device To make U11 the active device remove R...

Страница 22: ...es this clocking configuration The jumpers must be set as described above XTAL_OUT from the CS485xx is MCLK for the system The CS8416 slaves to this MCLK and generates SCLK and LRCLK for the ADC side of the CS42448 and the DAI side of the DSP On the output side the CS485xx slaves to MCLK from CS8416 and masters SCLK and LRCLK for the DAC side of the CS42448 An example of this clocking scheme can b...

Страница 23: ...ng S PDIF stream is the MCLK for the system The CS8416 also generates SCLK and LRCLK for the DAI side of the DSP from the recovered MCLK On the output side the CS485XX slaves to MCLK from CS8416 and masters SCLK and LRCLK for the DAC side of the CS42448 An example of this clocking scheme can be found in pcm cpa CS42448 2x CS485XX CS42448 2x CS8416 MUXED_DSP_SCLK1 DSP_SCLK DSP_LRCLK DSP_DAI4 MUXED_...

Страница 24: ...Changing the Audio Input Source on page 4 3 MCLK is generated by the PLL on the USB Master card The PLD on the USB Master Card generates SCLK and LRCLK for the DAI side of the DSP from the MCLK On the output side the CS485xx slaves to MCLK from the USB Master Card and masters SCLK and LRCLK for the DAC side of the CS42448 The CS485XX always masters its output clocks DSP_SCLK DSP_LRCLK CS42448 2x C...

Страница 25: ...order to install the USB drivers on your PC and launch DSP Composer the GUI used to control the CDB48500 After following the instructions in Section 2 1 4 Running a Stereo PCM Application on CDB48500 USB on page 2 6 the DSP Composer main window will appear as shown in Figure 4 1 Figure 4 1 shows the DSP Composer main window for a PCM pass through application on the CDB48500 The blocks shown in the...

Страница 26: ...However it is possible to evaluate the CS48520 and the CS48540 on this board When you drag the system block on to the work space a popup menu is displayed as shown in Figure 4 2 This menu lets you choose the target chip that you need to evaluate When you select the target chip place the template of the target chip on the analog connectors The template is a guide that shows which input output chann...

Страница 27: ...nput stream and must not be changed The Master Slave property must always be set to Master to indicate that the S PDIF transmitter masters MCLK SCLK and LRCLK as described in Section 3 1 11 2 Clock and Data Flow for S PDIF Input on page 3 7 The Audio In module with S PDIF In as the input source is shown in Figure 4 3 Figure 4 3 Audio In via S PDIF In 4 2 2 2 Audio In via 8 channel ADC To deliver d...

Страница 28: ...t the DAI port of the DSP As shown in Figure 4 5 This dialog allows the user to set the following parameters for the CS485xx SCLK Polarity LRCLK Polarity Temperature Grade CDB48500s are populated with commercial grade chips by default Reference Clock Set to the frequency of the crystal driving the CS485XX Y1 This is the reference clock is used to determine the clock dividers needed to derive Fs in...

Страница 29: ...n of the CDB48500 is configured through the Audio Out block in DSP Composer 4 2 3 1 DAO Output of CS485xx The digital audio output DAO of the CS485XX is very flexible making it compatible with a wide variety of audio devices This port can configured using the dialog box shown in Figure 4 6 Right click on the Audio Out block then select Device Properties Right clicking the DAO block and selecting D...

Страница 30: ... LRCLK polarity Select the phase of LRCLK when the left sample will be shifted out SCLK polarity Select which edge of SCLK for which the output data will be valid DAO1 DAO2 Select independent or unified clock domains for the DAO1 and DAO2 audio output ports MCLK SCLK Ratios Select the ratio of LRCLK to MCLK and LRCLK to SCLK 4 2 3 2 CS42448 DAC Properties The analog output properties are selected ...

Страница 31: ... Master Slave settings for the SCLK LRCLK Automatically configure for complement of the DAO Setting Cannot be changed SCLK polarity Slaves to the DAO Setting Cannot be changed 4 2 4 Changing Serial Control Protocol I2 C or SPI The CDB48500 is designed to communicate using either I2C or SPI protocols In order to change the communication mode in DSP Composer go to the menu bar and select File Ö Prop...

Страница 32: ...4 2 5 Headphone Output The CDB48500 is designed with one Stereo Headphone output The content of the Headphone output is controlled by the Remap tab in the SPP and APP module The 2 HpL field is used to select the channel that will be output on the left channel and 3 HpR field is used to select the channel that will be output on the right channel The Remap tab is shown in Figure 4 9 ...

Страница 33: ...DIF Transmitter The CDB48500 is designed with one S PDIF Transmitter output The content of the S PDIF Transmitter output is controlled by the Remap tab in the SPP and APP module The 6 SPDIF L is used to select the channel that will be output on the left channel and 7 SPDIF R is used to select the channel that will be output on the right channel The Remap tab is shown in Figure 4 9 ...

Страница 34: ...Basic Application Download and System Configuration for PCM Pass through CDB48500 USB Evaluation Kit Guide DS784DB1 Copyright 2008 Cirrus Logic Inc 4 10 ...

Страница 35: ...ered and driven out the XTAL_OUT pin of the CS485XX chip and can be used as the audio MCLK for analog sampling in the CS42448 CODEC The DSP has a dedicated reset line DSP_RESET that must be driven by the host to initialize the CS485XX s communication mode and initiate the first boot sequence This signal is independent of any other reset on the board and can be used to sequence device power up The ...

Страница 36: ...erial flash a 512 Kb Serial I2C is also provided Information on programming these devices and booting from them can be found in the AN298MPMF A 1 1 1 5 S PDIF Receiver See Figure A 5 The CS8416 is a S PDIF receiver capable of supporting sample rates up to 192 kHz The serial host control port SCL CCLK SDA CDOUT AD1 CDIN AD0 CS shares clock and data lines with the CS485XX and CS42448 The CS8416_CS l...

Страница 37: ... single ended mode This is evident when looking at the input and output filter circuitry on page 6 of the schematics AIN5 of the CS42448 has an internal analog multiplexer that can be used to select between single ended inputs on the AIN5 and AIN5 pins This feature is used to share AIN5 between the microphone input and RCA jack J5 The transistor connected to MUTEC Q1 provides the current drive nec...

Страница 38: ... to an 1 8 headphone output The headphone maps to DAO2_D1 on the DSP Refer to section Section 4 2 5 Headphone Output on page 4 8 for more details on the headphone output A 1 1 1 10 Mic and Pre Amp See Figure A 10 The CDB48500 has a 1 8 microphone input jack to allow direct connection to an encapsulated condenser microphone ECM Because the output of the ECM is so small a pre amplifier is needed to ...

Страница 39: ...d regulators and an external source for 5 V 3 3 V and 1 8 V This is a feature intended only for special applications so these jumpers should be left in the REG position for normal operation The DC input power jumper J3 is used to bring the main 9 to 12VDC supply voltage from the control connector J11 rather than the standard DC input connector J25 This jumper is not populated on the board and is i...

Страница 40: ...DS784DB1 Copyright 2008 Cirrus Logic Inc A 6 Introduction CDB48500 USB Evaluation Kit Guide Figure A 1 CS48500 System Block Diagram ...

Страница 41: ...DS784DB1 Copyright 2008 Cirrus Logic Inc A 7 Introduction CDB48500 USB Evaluation Kit Guide Figure A 2 DSP Input Data Multiplexing ...

Страница 42: ...DS784DB1 Copyright 2008 Cirrus Logic Inc A 8 Introduction CDB48500 USB Evaluation Kit Guide Figure A 3 DSP ...

Страница 43: ...DS784DB1 Copyright 2008 Cirrus Logic Inc A 9 Introduction CDB48500 USB Evaluation Kit Guide Figure A 4 Serial Flash Memory ...

Страница 44: ...DS784DB1 Copyright 2008 Cirrus Logic Inc A 10 Introduction CDB48500 USB Evaluation Kit Guide Figure A 5 SPDIF Receiver ...

Страница 45: ...DS784DB1 Copyright 2008 Cirrus Logic Inc A 11 Introduction CDB48500 USB Evaluation Kit Guide Figure A 6 Codec 1 CS42448 ...

Страница 46: ...DS784DB1 Copyright 2008 Cirrus Logic Inc A 12 Introduction CDB48500 USB Evaluation Kit Guide Figure A 7 Codec 2 CS42448 ...

Страница 47: ...DS784DB1 Copyright 2008 Cirrus Logic Inc A 13 Introduction CDB48500 USB Evaluation Kit Guide Figure A 8 Codec 1 and Codec 2 Input Filters ...

Страница 48: ...DS784DB1 Copyright 2008 Cirrus Logic Inc A 14 Introduction CDB48500 USB Evaluation Kit Guide Figure A 9 Output Filters Headphone Output ...

Страница 49: ...DS784DB1 Copyright 2008 Cirrus Logic Inc A 15 Introduction CDB48500 USB Evaluation Kit Guide Figure A 10 Mic Preamp ...

Страница 50: ...DS784DB1 Copyright 2008 Cirrus Logic Inc A 16 Introduction CDB48500 USB Evaluation Kit Guide Figure A 11 Control Connector and Power ...

Страница 51: ... power supply is not connected to CDB48500 the CDB48500 is not a USB powered device Make sure the DC wall supply is connected to the DC power input jack J25 and the supply is plugged into a wall outlet CDB48500 USB Drivers not installed before connecting to PC Pull the DC power plug on the CDB48500 Open the device manager on the PC and search for the Opal Kelly device under USB Devices If there is...

Страница 52: ...B 2 Copyright 2008 Cirrus Logic Inc DS784DB1 Revision History CDB48500 USB Evaluation Kit Guide ...

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