Cirrus Logic CDB43L22, Руководство пользователя

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DS792DB1 5
CDB43L22
The CS43L22 is configured using the Cirrus FlexGUI. The device configuration registers are accessible via
the “Register Maps” tab of the Cirrus FlexGUI software. This tab provides low-level control of each bit. For
easier configuration, additional tabs provide high-level control.
Section 4 “Software Mode Control” on
page 11 provides configuration details.
1.5 CS8416 Digital Audio Receiver
A complete description of the CS8416 receiver and a discussion of the digital audio interface can be found
in the CS8416 data sheet.
The CS8416 converts the input S/PDIF data stream from the optical or RCA connector into PCM data that
is input to the CS43L22.
Selections are made by using the “Board Configuration” tab of the Cirrus FlexGUI software. Section 4 “Soft-
ware Mode Control” on page 11 provides configuration details.
1.6 Oscillator
The socketed on-board oscillator can be selected as the system master clock source by using the selections
on the “Board Configuration” tab of the Cirrus FlexGUI.
Section 4 “Software Mode Control” on page 11 pro-
vides configuration details.
The oscillator is mounted in pin sockets, allowing easy removal or replacement. The device footprint on the
board will accommodate full- or half-can-sized oscillators.
1.7 I/O Stake Headers
The evaluation board has been designed to allow interfacing with external systems via a serial port header
(reference designation J8) and a control port header (reference designation J109). The serial port header
provides access to the serial audio signals required to interface with a DSP (
Figure 10 on page 20 ).
The control port header provides bidirectional access to the I²C control port signals by simply removing all
the shunt jumpers from the “USB” position. The user may then connect a ribbon cable connector to the “Ext
Sys Connect” pins for external control of board functions. A single row of “GND” pins are provided to main-
tain signal ground integrity. Two unpopulated pull-up resistors are also available should the user choose to
use the CDB43L22 logic supply (VL) externally.
1.8 Analog Inputs
Four stereo jack connectors can be used to supply AC coupled line-level analog inputs to the CS43L22 for
testing the device in passthrough mode.
Figure 10 on page 20 illustrates how the analog passthrough inputs are connected and routed. Table 5 on
page 18 details the jumper selections. The CS43L22 data sheet specifies the allowed full scale input voltage
level.
1.9 Analog Outputs
The CDB43L22 has a stereo headphone/line output jack (J40) and a dedicated stereo headphone (HP) out-
put jack (J21) to monitor the CS43L22’s ground centered analog output. The dedicated HP jack (J21) has
circuitry that drives the SPKR/HP pin low when a stereo jack is inserted thereby allowing users to test the
CS43L22’s HP detect capability. Stake headers (J3 and J9) are provided to allow the user to select either
a 16
Ω
or a 32
Ω
load for the headphone amplifier output. Stake headers( J1 and J2) are also provided to
allow one to filter HP/Line outputs from the board. HP jack J21 can be used to connect a real headphone to
provide an actual headphone load while performance measurements are taken on HP jack J40. When con-