Chipcon CC400DB, Руководство пользователя

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SWRU068
12
4 Demonstration Board hardware description
4.1 RF-section
The RF section consists of a CC400 chip with a few external components. The different
parts of the circuit are explained below.
4.1.1 PLL loop filter
The PLL loop filter contains the components C121-C123 and R121-R123. The
SmartRF
®
Studio software program has been used to calculate the component values.
Using the calculated component values for the loop filter gives an optimum loop
bandwidth for the selected system parameters.
The transmitted frequency is FSK modulated, which means that the bits ‘0’ and ‘1’ is
coded by jumping between two different frequencies. The loop filter bandwidth is
optimised according to the frequency separation (difference between the two
frequencies) and the data rate (the speed we jump between these two frequencies).
4.1.2 IF filter
The Demonstration Board use the internal 200kHz IF filter. The 200kHz IF filter has a
larger bandwidth than the 60 kHz IF filter, and therefor allows us to use a less accurate,
and hence less expensive crystal. The sensitivity is slightly less than for the 60 kHz IF,
but is considered adequate in this application.
4.1.3 The modulation input/output
The modulation input/output (DIO) is connected to a micro-controller I/O pin. The data
to be sent is Manchester encoded (also known as bi-phase-level coding) by the micro-
controller. The Manchester code ensures that the signal has no DC component, which is
necessary for the FSK demodulator to work in an optimal way. The Manchester code is
based on transitions; a “0” is encoded as a low-to-high transition, a “1” is encoded as a
high-to-low transition. This is illustrated in the figure below.
Time
TX
data
1 0 1 1 0 0 0 1 1 0 1