Changhong Electric 21BM91, Руководство по обслуживанию, Страница: 42 / 58

SERVICE MANUAL
3) Pin Configuration
Table 14
8-lead MAP
8-lead TSSOP
Pin Name Function
A0-A2 Address Inputs
SDA Serial Data
SCL Serial Clock Input
WP Write Protect
NC No Connect
VCC
WP
SCL
SDA
8
7
6
5
A0
A1
A2
GND
1
2
3
4
8
7
6
5
1
2
3
4
VCC
WP
SCL
SDA
A0
A1
A2
GND
Bottom View
Fig. 19
8-pin PDIP
8-lead SOIC
8
7
6
5
1
2
3
4
8
7
6
5
1
2
3
4
VCC
WP
SCL
SDA
A0
A1
A2
GND
VCC
WP
SCL
SDA
A0
A1
A2
GND
Fig. 20
4) Pin Description
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM device
and negative edge clock data out of each device.
SERIAL DATA (SDA): The SDA pin is bi-directional for serial data transfer. This pin is open-drain
driven and may be wire-ORed with any number of other open-drain or open-collector devices.
DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device address inputs that are
hard wired for the AT24C01A and the AT24C02. As many as eight 1K/2K devices may be addressed
on a single bus system (device addressing is discussed in detail under the Device Addressing section).
The AT24C04 uses the A2 and A1 inputs for hard wire addressing and a total of four 4K devices may
be addressed on a single bus system. The A0 pin is a no connect.
The AT24C08 only uses the A2 input for hardwire addressing and a total of two 8K devices may be
addressed on a single bus system. The A0 and A1 pins are no connects.
The AT24C16 does not use the device address pins, which limits the number of devices on a single bus
to one. The A0, A1 and A2 pins are no connects.
WRITE PROTECT (WP): The AT24C01A/02/04/16 has a Write Protect pin that provides hardware data
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