Cermetek Microelectronics, Inc.
CH1788 Surface Mount PLCC 2400bps Modem
2006 Cermetek Microelectronics, Inc.
Page 3
Document No. 607-0018 Revision A6 (01/06)
Idle Power Standby.
In idle power standby mode is
enabled by executing
ATS73+2
in the set up string.
Power is switched off automatically by the CH1788
after a period of no activity and is restored
automatically by the CH1788 when activity is again
detected. Activity is defined as a change of status on
DTR, TXD, RST or on any of the other input pins or
an Incoming Ringing signal on TIP/RING. Idle power
mode transitions are transparent to the user.
Zero Power Standby.
In applications requiring near
zero power during standby periods, the power may be
switched completely off to the CH1788. This is done
by issuing the
AT@Z
command or by toggling DTR
after the
ATR5
command has been executed.
Normal operation is resumed by performing a 50
msec (minimum) hardware reset on the RST pin.
RING INDICATION
The CH1788 produces a low going 80 msec pulse on
the RI Pin when a valid Incoming Ring signal is
detected. By default, a valid ring signal must fall
within the 10-75 Hz range and have a cadence of 2
seconds on and 4 seconds off. Alternate frequency
ranges and ring cadence’s may be programmed.
CH1788 RESET
The CH1788 may be reset using any of the following
methods. Delay sending commands to the CH1788
for a period of 500 msec after reset has been
completed to allow the CH1788 time to properly
reconfigure.
Hardware Reset.
Upon power-up or when power
cycling, the CH1788 will automatically generate an
internal reset pulse. However, if the power supply
comes up too slowly, or has a rise time greater than
50 msec, the internal reset detection circuitry may not
generate the hardware reset.
RST Pin.
Initiate a reset externally anytime after the
power supply has stabilized by applying a 50 msec
TTL high reset pulse to the RST pin.
Software Reset.
Execute the
ATZ
command while in
command mode.
DTR Pin.
Toggle the DTR pin after executing the
ATR3
command while in command mode.
POWER SUPPLY
Although any standard 5 volt DC supply is
acceptable, the user should be aware that during the
course of normal operation the CH1788 decodes
analog data signals from the PSTN line that are in the
millivolt range. Steps must be taken by the user to
insure that power supply noise on all supply lines,
including ground, does not exceed 50 mV peak to
peak. Any frequency between 20 kHz and 150 kHz
must be less than 500 micro volts peak. If necessary,
use dedicated power and ground planes. Failure to
provide such operating conditions could cause the
CH1788 to malfunction or to function erratically.
Recommendation.
To reduce the effects of supply
noise, it is recommended that by-pass capacitors be
placed on the power supply as close to the CH1788’s
supply input (i.e., Pin 20) as practical. A 10
µ
F
Tantalum capacitor in parallel with a 0.01 µF ceramic
is recommended.
DTMF TONE DETECTION
The CH1788 is capable of detecting DTMF tones
without external hardware.
Setup.
Detection will only occur when the CH1788 is
Off-Hook and in the command mode.
DTMF Decoding.
The
ATJ6
command enables
DTMF decoding. Register S65 will contain the
decoded DTMF result. The S65 register must be
continuously interrogated by the host controller
because the decoded DTMF decimal value is only
present in S65 when the DTMF tones are present on
the PSTN line.
The full range of decoded DTMF decimal values are
listed in Table 1. If the S65 register contains zero, it
indicates that no DTMF tones are present. Note, the
S65 register will contain zero between DTMF tones.
Recommendation.
Sample the S65 register at a
rate at least twice (2X) the fastest DTMF tone
periodic rate. DTMF tones typically have a cadence
of 70 msec on and 70 msec off. In this case, the S65
register should be sampled at least every 35 msec.
Table 1. DTMF Tone Conversion.
DTMF TONE
DECIMAL VALUE
1 129
2 130
3 131
4 132
5 133
6 134
7 135
8 136
9 137
0 138
* 139
# 140
No Tone
0
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