IR LRM2 Radio Module
Host Interface Definition
Document p/n: 9S02-9027-A001 Rev.A
3.
Host Interface Definition
3.1
Pins Assignment
Board to board connector Pin Details
J1
Pin number
Signal name
Pin number
Signal name
1
GND
2
GND
3
TDI-RF
4
nRESET-RF
5
MASTER-CTRL-US1-RX-M
6
RFIO-2-M
7
GND
8
MASTER-DATA-US0-TX-M
9
I2C0-SDA-RF
10
RFIO-3-M
11
I2C0-SCL-RF
12
TDO-RF
13
GND
14
MASTER-DATA-US0-RX-M
15
RFIO-1-M
16
TMS/SWDIO-RF
17
BOOT-EN/RFIO-0-M
18
TCK/SWDCLK-RF
19
GND
20
MASTER-CTRL-US1-TX-M
J5
Pin number
Signal name
Pin number
Signal name
1
GND
2
GND
3
nRESET-M
4
3.3V
5
nRESET-S
6
3.3V
7
BOOT-EN/RFIO-0-S
8
GND
9
SLAVE-DATA-US0-RX-S
10
REV_AN
11
SLAVE-CTRL-US1-RX-S
12
RFIO-1-S
13
SLAVE-DATA-US0-TX-S
14
ANT_SEL
15
SLAVE-CTRL-US1-TX-S
16
FWD_AN
17
READY
18
READY (For PA_EN)
19
GND
20
GND
Table 3.1 – Host Interface pins assignment
