
— 7 —
3-2. CIRCUIT DIAGRAM
GND
VDD2
CRIN
BA
T
VCH
VDD3
VC1
VC2
C1
C3
C8
XTB
Xtal1
L4
L60
- - - - -
LC1
LC5
- - -
CT
LCD
LD1
CRMS
S2
S4
S3
VDD1
C2
VDD2A
BD1
GND
A
C9
Z
LL1
Tr
1
CRST
XT
+
T1
T2
T3
KI1
KI2
KI3
KI4
KI5
KI6
KI7
KI8
KI9
EMP
S1
PZ
VDSP
C4
V
OSC
C7
VC3
VC4
C5
VHF
C6
VA
N
KC5
KC4
KC3
KC2
PX1
PY1
Vref
PW1
PY3
PX3
PU1
PZ1
LE
PH
ADIN
PO
KC6
KC1
AC
T4
L2
L1
✽
1
✽
1
✽
1
✽
1
✽
1
✽
1
✽
1
✽
1
✽
1
✽
1
✽
1
✽
1
✽
1
✽
1
✽
1
✽
1
✽
1
✽
1
✽
1
✽
1
✽
1
✽
1
✽
1
✽
1
A2OUT
✽
1
✽
4
✽
4
+
✽
1
Creg
PON
REG
AG
C
VSM0
VSM1
TCO
GND
HOLD
VCC
1
2
3
16
15
14
4
5
6
7
8
13
12
11
10
9
Cxt
C401
Rxt2
Ccp9
Cf12
Cagc
Cbat
Rbat
Xtal2
IC
ANT
Rant2
Cf13
Rcp
An.B
CLF1
E'
Cel
EL
INV
LL2
L+
V
OUT
L-
GND
CLF2
V+
BA
CK
FR
ONT
PTIN
PT
SCUT
SCK
SDO
CSB
SDI
LC6
Rxt3
Xtal3
✽
2
✽
2
✽
2
✽
3
✽
1
✽
3
✽
3
✽
1
S5
Ccont
C402
C403
C603
C602
C601
Rant1
Rcont
Rs
Rg
Rd
Cc
FET
L3,L51-54
✽
1
✽
5
Rpd
TOT
A
L
BONDING
(LSI
TEST A
C
,
T1-3, KI1-9, L8-39)
129 Pins
96 Pins
LSI
✽
1.
No bonding
✽
2.
Shor
t (Solder
ing)
✽
3.
Latch type k
e
y
✽
4.
O1 and O2 are used in this module
.
✽
5.
An.B is not mounted in this module
.