Casio CPS-7, Руководство по обслуживанию

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RESET CIRCUIT
When batteries are set or an AC adapter is connected, the reset IC provides a low pulse to the CPU. The CPU
then initializes its internal circuit.
When the power switch is pressed, the CPU receives a low pulse of POWER signal.The CPU raises APO
signal to +5 V to turn power on.
Reset IC
IC106
RE5VA35AA
Power Supply Circuit
VDD
Battery set
RESET
VDD
POWER
From power switch NMI
APO
CPU
LSI101
UPD912GF-3BA
SCKO
RSTB
POWER SUPPLY CIRCUIT
The power supply circuit generates four voltages as shown in the following table. VDD voltage is always
generated. The others are controlled by APO signal from the CPU.
Name Voltage For operation of
VDD +5 V CPU, Reset IC, Sound source ROM
AVDD +5.3 V DAC
AVCC +12 V Filter block, Equalizer block
VC +12 V Power amplifier
CPU (LSI101: UPD912GF-3BA)
The 16-bit CPU contains a 1k-byte RAM, three 8-bit I/O ports, two timers, a keycontroller and serial interfaces.
The CPU detects key velocity by counting the time between first-key input signal FI and second-key SI from
the keyboard. The CPU read sound data and velocity data from the sound source ROM in accordance with
the selected tone. Then the CPU provides 16-bit serial sound data to the DAC.The CPU also controls MIDI
input/output and LED driving.
The following table shows the pin functions of LSI101.
Pin No. Terminal In/Out Function
1 TXD0 Out MIDI signal input
2 RXD0 In MIDI signal output
3 SCK0 Out APO (Auto Power Off) signal output
4 ~ 6 — Not used. Connected to ground.
7 AVCC In Ground (0 V) source
8, 9 AN0, AN1 — Not used. Connected to ground.
10 AGND In Ground (0 V) source
11 BCK Out Bit clock output
12 SO Out Serial sound data output
13 LRCK Out Word clock output
14 GND In Ground (0 V) source