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CT-DBT0X l User’s Manual

39

Chapter 5: System BIOS

5.1.8 LPSS & SCC Configuration

The BIOS automatically detects the presence of SATA device and the hardware installed in the SATA
ports will be showed in the configuration. Each port can be enabled or disabled individually.

SCC SD Card Support:

Options: Disable, Enable.

LPSS I2C #2 Support:

Options: Disable, Enable.

5.1.9 Network Stack Configuration

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Содержание CT-DBX0x

Страница 1: ...CT DBX0x 3 5 Industrial Single Board Computer with Intel Atom Processor E3800...

Страница 2: ...nnector 17 2 3 5 HDMI Connector 17 2 3 6 LAN Connector 17 2 4 Internal Connectors 18 2 4 1 Front Panel Audio Connector AUDIO 18 2 4 2 Backlight Control Connector CN1 18 2 4 3 COM2 4 Serial Ports COM2...

Страница 3: ...1 Advanced 33 5 1 1 ACPI Settings 34 5 1 2 F81866 Super IO Configuration 34 5 1 3 Hardware Monitor 36 5 1 4 Serial Port Console Redirection 36 5 1 5 CPU Configuration 37 5 1 6 SATA Configuration 38 5...

Страница 4: ...tronic or mechanical including photocopying recording or information storage and retrieval systems without the prior written permission of C T Solutions Inc Copyright 2015 C T Solutions Inc Trademarks...

Страница 5: ...e power outlet Disconnect this equipment from the power before cleaning Use a damp cloth Do not use liquid or spray detergents for cleaning Avoid the dusty humidity and temperature extremes Do not pla...

Страница 6: ...number Description of your peripheral attachments Description of your software operating system version application software etc A complete description of the problem The exact wording of any error m...

Страница 7: ...Chapter 1 Product Introductions...

Страница 8: ...in a single chip solution One 240 pin SODIMM sockets supports non ECC unbuffered DDR3L 1333MHz memory up to 4GB The Intel HD graphics controller integrated within the processor supports three independ...

Страница 9: ...s via header COM2 4 1x 8 bit GPIO 4 bit input 4 bit output 5V level GPO default High GPI supports SMI trigger 1x PS 2 keyboard and mouse 1x front panel audio 1x Reset button header 1x Power on off hea...

Страница 10: ...100 P0 Celeron J1900 CT DBT01 J1900 6 DBT0104S100 P0 Celeron N2807 CT DBT01 N2807 6 DBT0105S100 P0 CT DBT02 Atom E3845 CT DBT02 E3845 6 DBT0201S100 P0 Atom E3827 CT DBT02 E3827 6 DBT0202S100 P0 Atom E...

Страница 11: ...CT DBT0X l User s Manual 11 1 4 Block Diagram Chapter 1 Product Introductions...

Страница 12: ...Chapter 2 Mechanical Specifications...

Страница 13: ...CT DBT0X l User s Manual 13 2 1 Dimensions Chapter 2 Jumper Connectors Units mm...

Страница 14: ...connector MINI_PCIE2 Mini PCI Express slot 2 DIMM 240 pin SODIMM socket PCIE1_MSATA Mini PCI Express slot 1 FAN Fan connector POWER_CONN ATX Power connector GPIO GPIO header PS2 PS 2 KB MS wafer conn...

Страница 15: ...Carrier Detect 6 DSR Data Set Ready 2 RXD Receive Data 7 RTS Ready To Send 3 TXD Transmit Data 8 CTS Clear To Send 4 DTR Data Terminal Ready 9 RI Ring Indicator 5 GND Ground COM1 VGA USB 2 0 HDMI LAN...

Страница 16: ...hoose from RS 232 RS 422 and RS 485 If RS 485 is selected you can enable disable the RS 485 Auto Flow Function which automatically handles half duplex control Save the configuration and exit the BIOS...

Страница 17: ...TX Pin Signal 1 USB 5V 2 USB_D 3 USB_D 4 GND 1 2 3 4 Pin Signal Pin Signal 1 HDMI_TX2_DP_B 2 GND 3 HDMI_TX2_DN_B 4 HDMI_TX1_DP_B 5 GND 6 HDMI_TX1_DN_B 7 HDMI_TX0_DP_B 8 GND 9 HDMI_TX0_DN_B 10 HDMI_CLK...

Страница 18: ...h 1 5mm wafer connector Chapter 2 Jumper Connectors Pin Signal Pin Signal 1 MICIN_L 2 MICIN_R 3 MIC1_JD 4 AGND 5 LOUT_L 6 LOUT_R 7 FRONT_JD 8 AGND 9 LIN_L 10 LIN_R 11 LINE1_JD 12 AGND Pin Signal Pin S...

Страница 19: ...0mm wafer connector 2 4 7 Power Button Pin Header JP3 Connector Type 1x2 pin pitch 2 00mm wafer connector Chapter 2 Jumper Connectors Pin Signal Pin Signal 1 GND 2 3 3V 3 LPC_AD3 4 NC 5 LPC_AD2 6 RESE...

Страница 20: ...pe 1x3 pin pitch 2 54mm pin header connector 2 4 11 Multi LED Pin Header LED Connector Type 2x6 pin pitch 2 00mm wafer connector Chapter 2 Jumper Connectors Pin Signal Pin Signal 1 5V 2 5V 3 Power ON...

Страница 21: ...2 LVDS_B3 3 LVDS_B_CLK 4 LVDS_B_CLK 5 LVDS_B2 6 LVDS_B2 7 LVDS_B1 8 LVDS_B1 9 LVDS_B0 10 LVDS_B0 11 LVDS_I2C_DAT 12 LVDS_I2C_CK 13 GND 14 GND 15 GND 16 GND 17 LVDS_A3 18 LVDS_A3 19 LVDS_A_CLK 20 LVDS_...

Страница 22: ...28 1 5V 46 LED_WPAN 11 REFCLK 29 GND 47 Reserved 12 UIM_CLK 30 SMB_CLK 48 1 5V 13 REFCLK 31 PETn0 49 Reserved 14 UIM_RESET 32 SMB_DATA 50 GND 15 GND 33 PETp0 51 Reserved 16 UIM_VPP 34 GND 52 3 3V 17...

Страница 23: ...Reserved 38 USB_D 3 Reserved 21 GND 39 Reserved 4 GND 22 PERST 40 GND 5 Reserved 23 PERn0 41 Reserved 6 1 5V 24 3 3Vaux 42 LED_WWAN 7 CLKREQ 25 PERp0 43 Reserved 8 UIM_PWR 26 GND 44 LED_WLAN 9 GND 27...

Страница 24: ...nector Type 4 pin pitch 2 54mm connector 2 4 20 USB 2 0 Pin Header USB_1 2 Connector Type 2x5 pin pitch 2 0mm wafer header connector Chapter 2 Jumper Connectors Pin Signal Pin Signal 1 USB 5V 2 USB 5V...

Страница 25: ...JP1 2 5 2 Panel Power JP2 2 5 3 Clear CMOS JP8 Chapter 2 Jumper Connectors Function Setting Jumper 12V 1 2 closed 5V Default 2 3 closed Function Setting Jumper 3 3V Default 1 2 closed 5V 2 3 closed Fu...

Страница 26: ...Chapter 3 Features Interface...

Страница 27: ...processor supports single channel non ECC unbuffered DDR3L 1333 memory up to 4 GB with data transfer rates up to 1333MT s 3 4 Graphics The graphics is integrated in the processor and based on Intel H...

Страница 28: ...ex port is the base address 0 and the data port is the base address 1 To access the GPIO register write index to the index port and then read write from to data port The configuration on the CT DBT0x...

Страница 29: ...AD I 3 11 2 Psuedo Code Set WDT Time Unit Second Unit Set WDT Timer Value Enable WDT 29 Chapter 3 Features Interface Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 GPO3 GPO2 GPO1 GPO0 GPI3 GPI2 GPI1...

Страница 30: ...Chapter 4 Driver Installation...

Страница 31: ...for the CT DBT0x can be found on the driver DVD included with the system Install the following drivers in the order listed 1 Chipset 2 Graphics 3 Audio 4 LAN 5 USB 3 0 6 Intel Serial IO 7 Intel Sideba...

Страница 32: ...Chapter 5 System BIOS...

Страница 33: ...The BIOS provides an interface to modify the configuration When the battery is removed all the parameters will be reset Turn on the computer and press DEL or F2 to enter the setup screens System Date...

Страница 34: ...S ACPI Auto Configuration Enable Hibernation Enable or Disable system ability to Hibernate ACPI Sleep state Select the highest ACPI sleep state the system will enter when the SUSPEND button is pressed...

Страница 35: ...CT DBT0X l User s Manual 35 Chapter 5 System BIOS 5 1 2 1 Serial Port 1 Configuration Device Type Select Choose from RS 232 RS 422 and RS 485 5 1 2 2 Serial Port 2 4 Configuration...

Страница 36: ...CT DBT0X l User s Manual 36 Chapter 5 System BIOS 5 1 3 Hardware Monitor 5 1 4 Serial Port Console Redirection Serial port console redirection settings...

Страница 37: ...e the additional hardware capabilities provided by Vanderpool Technology Execute Disable Bit XP can prevent certain classes of malicious buffer overflow attacks when combined with a supporting OS Wind...

Страница 38: ...vice and the hardware installed in the SATA ports will be showed in the configuration Each port can be enabled or disabled individually SATA Speed Support Options Gen 1 Gen 2 SATA Mode Select IDE or A...

Страница 39: ...tically detects the presence of SATA device and the hardware installed in the SATA ports will be showed in the configuration Each port can be enabled or disabled individually SCC SD Card Support Optio...

Страница 40: ...ways do not allow disabling GA20 this option is useful when any RT code is executed above 1MB Option ROM Message Set display mode Force BIOS or Keep Current for Option ROM INT19 Trap Response BIOS rea...

Страница 41: ...pter 5 System BIOS 5 1 11 SDIO Configuration SDIO Access Mode Auto Option Access SD device in DMA mode if controller supports it otherwise in PIO mode DMA Option Access SD device in DMA mode PIO Optio...

Страница 42: ...off This is a workaround for OSes without EHCI hand off support The EHCI ownership change should be claimed by EHCI driver USB Mass Storage Driver Support Enable Disable USB Mass Storage Driver Suppo...

Страница 43: ...nual 43 Chapter 5 System BIOS 5 1 13 Security Configuration XE EOP Message Send EOP Message Before Enter OS Intel AT Enable Disable BIOS AT Code from Running Intel AT Platform PBA Enable Disable BIOS...

Страница 44: ...CT DBT0X l User s Manual 44 Chapter 5 System BIOS 5 2 Chipset 5 2 1 Northbridge Configuration...

Страница 45: ...ost Enable Disable GFX Boost PAVC Enable Disable Protected Audio Video Control DVMT Pre Allocated Select DVMT 5 0 Pre Allocated Fixed Graphics Memory size used by the Internal Graphics Device DVMT Tot...

Страница 46: ...nual 46 Chapter 5 System BIOS 5 2 1 2 LCD Control Primary IGFX Boot Display Default setting is VBIOS Default CRT selects VGA EFP selects DisplayPort LFP selects LVDS LCD Panel Type Default setting is...

Страница 47: ...r 5 System BIOS 5 2 2 Southbridge Configuration High Precision Timer Enable or Disable the High Precision Event Timer Restore AC Power Loss Select AC power state when power is re applied after a power...

Страница 48: ...ONLY the Administrator s password is set then this only limits access to Setup and is only asked for when entering Setup If ONLY the User s password is set then this is a power on password and must be...

Страница 49: ...Menu Secure Boot Secure Boot can be enabled if the System running in User mode with enrolled Platform Key PK and CSM function is disabled Secure Boot Mode Secure Boot mode selector Custom Mode enable...

Страница 50: ...activation key 65535 0xFFFF means indefinite waiting Bootup NumLock State Select Enable or Disable for the keyboard NumLock state Quiet Boot Enables or Disables Quiet Boot option Boot Order Priorities...

Страница 51: ...Chapter 6 Address Map...

Страница 52: ...CT DBT0X l User s Manual 52 Chapter 6 Address Map 6 1 I O Port Address Map The assignments of the I O port addresses for the CT DBT0x under Windows 7 Ultimate 64 bit are shown below...

Страница 53: ...CT DBT0X l User s Manual 53 Chapter 6 Address Map I O Port Address Map cont d...

Страница 54: ...CT DBT0X l User s Manual 54 Chapter 6 Address Map I O Port Address Map cont d...

Страница 55: ...CT DBT0X l User s Manual 55 Chapter 6 Address Map 6 2 Interrupt Controller IRQ Map The interrupt controller map for the CT DBT0x under Windows 7 Ultimate 64 bit is shown below...

Страница 56: ...CT DBT0X l User s Manual 56 Chapter 6 Address Map Interrupt Controller IRQ Map cont d...

Страница 57: ...CT DBT0X l User s Manual 57 Chapter 6 Address Map Interrupt Controller IRQ Map cont d...

Страница 58: ...CT DBT0X l User s Manual 58 Chapter 6 Address Map Interrupt Controller IRQ Map cont d...

Страница 59: ...CT DBT0X l User s Manual 59 Chapter 6 Address Map Interrupt Controller IRQ Map cont d...

Страница 60: ...CT DBT0X l User s Manual 60 Chapter 6 Address Map Interrupt Controller IRQ Map cont d...

Страница 61: ...CT DBT0X l User s Manual 61 Chapter 6 Address Map Interrupt Controller IRQ Map cont d...

Страница 62: ...CT DBT0X l User s Manual 62 Chapter 6 Address Map Interrupt Controller IRQ Map cont d...

Страница 63: ...CT DBT0X l User s Manual 63 Chapter 6 Address Map 6 3 Memory Map The memory map of DRAM for the CT DBT0x under Windows 7 Ultimate 64 bit is shown below...

Страница 64: ...CT DBT0X l User s Manual 64 Chapter 6 Address Map Memory Map cont d...

Страница 65: ...Copyright 2016 C T Solution Inc All Rights Reserved www candtsolution com...

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