CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
31
Pin #
GPIO#
Default Configuration
A93
GPIO4
GPO0
A85
GPIO3
GPI3
A67
GPIO2
GPI2
A63
GPIO1
GPI1
A54
GPIO0
GPI0
The GPIO function, provided by Intel Tiger Point NM10, can be accessed
through GPIO Base Address Register (GPIOBASE). The configuration on
CT-CCV6X is described as below.
Register
Address
GPIOBASE Base Address
0x500
The general I/O read/write function is used to access and configure the NM10.
Through the I/O read or write command, the current status of GPIO can
configure each pin to input or output.
4.16.2 Registers Description
4.16.2.1
GPIO Use Select Register 1 (Offset G0x00)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
GPIO3
GPIO2
GPIO1
GPIO0
GPIO Use Select Register 2 (Offset G0x30)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
GPIO7
GPIO6
GPIO5
GPIO4
Bit X = 0 means Native Function
Bit X = 1 means GPIO Function
4.16.2.2
GPIO Input/Output Select Register 1 (Offset G0x04)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
GPIO3
GPIO2
GPIO1
GPIO0
Содержание CT-CCV6X
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