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User's Manual (MUT)
EASY3000/4000 Embedded Assembly SYstem
01/09/2005
5
NPO:
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00105/03:A1676A.MUTx/05 A1676A_REV5.DOC 27
27
PASSIVE INTERLOCK: it is necessary to short circuit pin 1 (“GND”, the first from left to
right) with pin 2 (“K=katode”), and pin 3 (“A=anode”) with pin 4 (“VCC”), or put a 50 Ohm
termination between pin 3 and pin 4.
ACTIVE INTERLOCK: it is necessary to send a voltage level (for example a TTL)
between pin 2 = katode and pin 3 = anode (high = interlock disabled, the channel can be
turned on; low = interlock enabled, the channel cannot be turned on), leaving pin 1 and
pin 4 disconnected.
GND
K
VCC
A
330 Ohm
~10 mA
Fig. 4.1 – Interlock diagram.