
Document type:
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User's Manual (MUT)
Mod. N968 Spectroscopy Amplifier
14/06/2004
4
NPO:
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00100/03:N968x.MUTx/04
N968_REV4.DOC
14
14
The chain is completed by the UNIpolar output stage, the delay circuit and the BIpolar
forming and output stage.
The fast and slow discriminators thresholds can be set either manually or automatically; in
the latter case, a circuit provides the threshold value according to the UNIpolar output noise
level.
The gated-logic block manages the signals provided by the discriminators, the baseline
restorer and performs the pile-up rejection (PUR) and live-time correction (LTC).
The timing diagram in Fig. 3.2 shows the PUR function and the circuit response to a pulse
pile-up: the second pulse arrives before the circuit recovers from Busy, the Fast
Differentiator produces another signal that triggers the discriminator to update the Busy
output and to provide another CRM pulse. In the meantime, at the arrival of the second
pulse, a bistable, set by the first pulse, produces the Inhibit output.
The LTC function is also shown in Fig. 3.2: after a piled-up event detected and then rejected
by the MCA (with the subsequent production of the RTP signal, which communicates that
the output has exceeded the MCA internal threshold), the LTC signal is produced and kept
active until the next RTP. While the LTC signal is active, the MCA halts its internal time
counter, thus allowing to obtain a correct input rate value (the greater the number of pulses,
the better the rate value measure): in fact the live time measured by the MCA will be
obtained by subtracting the MCA dead time and the time the LTC is active from the total
time. In this way the source actual rate will be equal to the ratio between the number of
converted pulses and the live-time.
Fig. 3.2: N968 I/O timing diagram
N968 INPUT
SHAPERS
INPUT
UNIPOLAR
OUTPUT
CRM
OUTPUT
BUSY
OUTPUT
FAST DIFF.
OUTPUT
INHIBIT
OUTPUT
1st event
2nd event
distortion
due to
pileup
LTC
OUTPUT
MCA RTP
OUTPUT
3rd event