Caen ELS PreDAC, Руководство пользователя

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PreDAC User’s Manual
23
2.3 Configuration Commands
The commands that can be used to set or to read the PreDAC device
configuration are described in this section.
2.3.1 STATUS Command
The internal status register of the PreDAC is a monitor of the status of the unit.
This register is composed of 2 bytes – i.e. 16 bits – where each byte cointains a specific
type of information (please note that bit 15 is the MSB and bit 0 is the LSB):
Status Register Structure
Byte #1
(bits 15 – 8)
Byte #0
(bits 7 – 0)
CONFIGURATION byte FAULTS byte
The structure of the CONFIGURATION byte (bits 15 – 8) of the status register
is hereafter presented:
Bit # Cell caption
15 PreDAC in Slave mode
14 External interlock status (0 – disabled; 1 – enabled)
13 TRIGGER mode (0 – disabled; 1 – enabled)
12 GATE mode (0 – disabled; 1 – enabled)
11 Channel 4 status (0 – OFF, 1 – ON)
10 Channel 3 status (0 – OFF, 1 – ON)
9 Channel 2 status (0 – OFF, 1 – ON)
8 Channel 1 status (0 – OFF, 1 – ON)
The structure of the FAULTS byte (bits 7 – 0) is as follows:
Bit # Cell caption
7 General fault (logical ‘OR’ of all faults)
6…2 do not care
1 Over-temperature fault (latch of an over-temperature event)
0 External interlock fault (latch of an interlock event)