User Manual
BCM91250E
01/07/05
B ro a d c o m C o r p o r a t i o n
Document
91250E-UM100-R
Firmware Configuration
Page 17
S e c t i o n 4 : F i r m w a r e C o n f i g u r a t i o n
The firmware image in the flash is bi-endian, so it supports both big and little-endian operation. The following
table describes where and how much physical memory the firmware maps to the chip selects on the generic
bus.
Table 12: Firmware Generic Bus Memory Mapping
Chip Select
Description
Physical Memory Address
Size
CS0
Boot ROM
0x1FC0_0000
2 MB
CS1
Alternate Boot ROM
0x1F80_0000
2 MB
Table 13: Firmware Configuration Bits Mapping
SW1
value
Action
0x0
UART console, no PCI initialization
0x1
PromICE console, no PCI initialization
0x2*
UART console, PCI initialization
0x3
PromICE console, PCI initialization
0x6
UART console, PCI initialization, Hypertransport (HT) slave mode
0x7
UART console, no PCI initialization, CFE safe mode
0x8
UART console, PCI initialization, device download mode
0x9
UART console, PCI initialization, device reboot mode
* = recommended/default setting.
All other settings are reserved.