Broadcast Electronics AM-2.5E, Руководство пользователя

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1-16
1-70. When a foldback condition, counter U31 will not be clocked to a maximum number
resulting in a HIGH carryout signal. The HIGH is inverted at U25B. U25B will output a
LOW to U16C. With a LOW from U25B or U25C, U16C will output a HIGH to foldback
indicator driver transistors Q20 and Q21. The transistors will be biased on to indicate the
transmitter is in a foldback condition.
1-71.
ATTACK SIGNAL OPERATION.
During high reflected/forward power, reflected power
emergency, over-temperature, or lightning conditions, an attack signal is applied to
priority encoder U28. U28 is designed to determine priorities if two attack signals occur
simultaneously. U28 will respond by routing a binary number to multiplexer U27. U27
will respond by selecting a clock signal from integrated circuit U26. U26 is a divider
designed to generate several clock signals. The clock signals are used to drive the power
control circuit up/down counters up or down as determined by the type of attack or
release signal applied to U28. For example, a high reflected power condition selects a 4
Hz clock signal. An over-temperature signal will select a 1/16th Hz clock signal.
1-72. The signal from U27 is applied to up/down counters U30/U31. U30/U31 will respond by
counting down and routing binary numbers to digital-to-analog converter U42. U42 will
respond by routing a reduced voltage reference to U43. U43 will output a reduced
reference voltage to reduce the transmitter output power.
1-73.
1.2 : 1 VSWR CONDITIONS.
1.2 : 1 VSWR conditions are monitored by a VSWR
detection circuit. The detection circuit consists of comparator U66C. U66C compares a
forward power sample to a reflected power sample. When the reflected power sample
increases above a forward power sample at approximately 1.2: 1, the output of U66C will
go LOW. The LOW is inverted at U54E. U54E will output a HIGH 1.2 : 1 VSWR signal to
OR gate U50C. U50C will output a HIGH to AND gate U51B and NAND gate U52C.
With a LOW reflected power emergency signal from U51A, U51B will output a LOW to
AND gate U50D. With a HIGH from U50C and a LOW from U51A, AND gate U52C will
output a LOW to U50D. U50D will respond by routing a LOW to antenna status red
indicator driver Q38. The output of Q38 will go LOW to bias the red antenna indicator
on. With no reflected power conditions, the output of OR gate U50B will be LOW. The
LOW biases the green antenna indicator on. This will result in a yellow antenna LED
indication.
1-74.
FOLDBACK RECOVERY.
When the foldback circuit is activated in response to a problem,
the controller will initiate a recovery sequence. The following text describes the reflected
power recovery, over temperature recovery, and reflected power emergency/lightning
recovery.
1-75. High Reflected Power Recovery. When the reflected power is reduced to a level below
the reference at U65C, U65C will output a LOW to U62A. With a LOW from U47B, U62A
will output a LOW to U47A. U47A will output a LOW reflected power high attack signal
to terminate foldback operation. Once the problem which caused the high reflected power
condition is removed, the transmitter will output a high reflected power release signal
(refer to the following text).
1-76. High Forward Power Recovery. High forward power conditions use the high reflected
power circuitry to reduce/recover the transmitter output power. When the transmitter
power is reduced to approximately 90%, the output of comparator U66B will go LOW. The
LOW is applied to AND gate U47B. U47B will output a LOW through U62A to AND gate
U47A. U47A will respond by routing a LOW to terminate the high reflected power attack
signal. Once the problem which caused the high forward power condition is removed, the
transmitter will output a high reflected power release signal (refer to the following text).