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5.6 Advanced Chipset Setup
This section allows you to configure the system based on the specific
features of the installed chipset. This chipset manages bus speeds and
the access to the system memory resources, such as DRAM and the
external cache. It also coordinates the communications between the
conventional ISA and PCI buses. It must be stated that these items
should never be altered. The default settings have been chosen
because they provide the best operating conditions for your system.
You might consider and make any changes only if you discover that the
data has been lost while using your system.
Phoenix – AwardBIOS CMOS Setup Utility
Advanced Chipset Features
Item Help
DRAM Timing Selectable [By SPD]
Menu Level X
CAS Latency Time [1.5]
Active to Precharge Delay [7]
DRAM RAS# to CAS# Delay [3]
DRAM RAS# Precharge [3]
Turbo Mode [Disabled]
Memory Frequency For [Auto]
System BIOS Cacheable [Enabled]
Video BIOS Cacheable [Enabled]
Memory Hole At 15M-16M [Disabled]
Delayed Transaction [Enabled]
Delay Prior to Thermal [16Min]
AGP Aperture Size (MB) [64]
** ON-chip VGA Setting **
On-chip VGA [Enabled]
On-chip Frame Buffer size [8MB]
Boot Display [CRT]
Panel Scaling [Auto]
Panel Number [1]
: Select Item + / - /PU/PD: Value F10: Save ESC: Quit F1: General Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults
NOTE: Panel Number: 1 (Default Panel 1: TOSHIBA LTM10C348F)
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