NF325-A7 BIOS Setup
DRAM Configuration
Figure 4.1 DRAM Configuration
Max Memclock (MHz)
Places an artifical memory clock limit on the system. Memory is prevented
from running faster than this frequency.
The Choices: 200 (Default), 166, 133, 100.
CAS# Latency
This field specify the cas# latency, i.e. cas# to read data valid.
The Choices: CL=2.5
(Default), CL=3.0, CL=2.0
RAS# to CAS# Delay (tRCD)
This field specifies the RAS# to CAS# Delay to read/ write command to the same
bank. Typically -20 Nsec.
The Choices: 3 BUS CLOCKS
(Default), 2 BUS CLOCKS, 4 BUS CLOCKS, 5
BUS CLOCKS, 6 BUS CLOCKS, 7 BUS CLOCKS
Min RAS# active time (tRAS)
This field specifies the minimum RAS# active time. Typically -45-60 Nsec.
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