Benefon DELTA TDP-40-TN2, Руководство по обслуживанию

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28.1.1999
XA0300E4_fm5.fm 8
Product: TDP-40-TN2 (Delta) / OA0300 Processor
that the switch is being pressed, and sets hold on the regulator for the PWRON line.
When the switch is depressed for a longer time, the program directs power to the
PWROFF line. During a short voltage break, C124 and R123 remember the previous
control, i.e. fet Q101 conducts again when the voltage is restored within 10 seconds.
The switch-fet also serves as a watch-dog should the voltage drop or processor
error-state continue; after 10 seconds, the radio will shut down completely.
Note! The RAM and ASIC circuits have their own regulator connected to the battery
to ensure an uninterrupted power supply. RAM power supply is ensured during a
battery-pack change by the battery A100.
6.2.4.9 Battery Voltage Measurement
The battery voltage is measured by an A/D converter. The converter 256 step con-
version scale is not sufficient as it stands, so the measured range is restricted to
5...8V by the operational amplifier I206. The reference voltage for the measurement
is provided by the processor regulator 5V supply. Calibration is done by the program
against a precisely known battery voltage.
6.2.4.10 I/O ports
The ASIC I/O ports PA...PF are 8-bit hold circuits. DATA is fed to the addressed out-
put. When the RESET line is down (0V) all the ASIC ports are zeroed (0V). As
RESET rises again, all of the two-way I/O ports are inputs until the program sets
them to the desired state. With the radio in OFF state, RESET is down so all of the
controls are also down although ASIC is still provided with operational voltage
(VRAM).
6.2.4.11 Tone Generator
Tones for the internal buzzer are provided by the ASIC tone generator. The fre-
quency can be programmed between 400...4000 Hz. The wave form is square.
6.2.4.12 SIS
SIS functions are provided by a mask-programmed single chip processor I202
(68HC11A8). It communicates with the host processor via ASIC with an RS232 bus
(5V levels). The circuit operation is not externally visible as it is a single-chip solu-
tion. User specific information is stored in EEPROM which CANNOT be read from
outside the chip. All external attempts to read the information clear both EEPROM
and RAM (fill with FF).
6.2.4.13 Power Adjustment
The transmitter control logic switches TX power and also adjusts it to the correct
level. The TXVCO signal sets the transmitter to ready-mode. Power is controlled by
the ASIC analog output D/A 1. It is a pulse frequency modulated output which is con-
verted to a DC voltage by integrating it with C287. 0V corresponds to "no power"
state, and 5V to maximum transmitter power. The power levels are calibrated by the
program at the source of measurement.